ROHS MC9S08QE128, Reference Manual

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Chapter 18 Debug Module (DBG) (128K)
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Freescale Semiconductor 323
18.3 Memory Map and Registers
This section provides a detailed description of all DBG registers accessible to the end user.
18.3.1 Module Memory Map
Table 18-1 shows the registers contained in the DBG module.
Table 18-1. Module Memory Map
Address Use Access
Base + $0000 Debug Comparator A High Register (DBGCAH) Read/write
Base + $0001 Debug Comparator A Low Register (DBGCAL) Read/write
Base + $0002 Debug Comparator B High Register (DBGCBH) Read/write
Base + $0003 Debug Comparator B Low Register (DBGCBL) Read/write
Base + $0004 Debug Comparator C High Register (DBGCCH) Read/write
Base + $0005 Debug Comparator C Low Register (DBGCCL) Read/write
Base + $0006 Debug FIFO High Register (DBGFH) Read only
Base + $0007 Debug FIFO Low Register (DBGFL) Read only
Base + $0008 Debug Comparator A Extension Register (DBGCAX) Read/write
Base + $0009 Debug Comparator B Extension Register (DBGCBX) Read/write
Base + $000A Debug Comparator C Extension Register (DBGCCX) Read/write
Base + $000B Debug FIFO Extended Information Register (DBGFX) Read only
Base + $000C Debug Control Register (DBGC) Read/write
Base + $000D Debug Trigger Register (DBGT) Read/write
Base + $000E Debug Status Register (DBGS) Read only
Base + $000F Debug FIFO Count Register (DBGCNT) Read only