ROHS MC9S08QE128, Reference Manual

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Chapter 18 Debug Module (DBG) (128K)
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Freescale Semiconductor 337
18.3.3.16 Debug Count Status Register (DBGCNT)
Module Base + 0x000F
7 6 5 4 3 2 1 0
R 0 0 0 0 CNT
W
POR
or non-
end-run
0 0 0 0 0 0 0 0
Reset
end-run
1
1
In the case of an end-trace to reset where DBGEN=1 and BEGIN=0, the CNT[3:0] bits do not change after reset.
0 0 0 0 U U U U
= Unimplemented or Reserved
Figure 18-17. Debug Count Status Register (DBGCNT)
Table 18-19. DBGS Field Descriptions
Field Description
3–0
CNT
FIFO Valid Count Bits — The CNT bits indicate the amount of valid data stored in the FIFO. Table 18-20 shows
the correlation between the CNT bits and the amount of valid data in FIFO. The CNT will stop after a count to
eight even if more data is being stored in the FIFO. The CNT bits are cleared when the DBG module is armed,
and the count is incremented each time a new word is captured into the FIFO. The host development system is
responsible for checking the value in CNT[3:0] and reading the correct number of words from the FIFO because
the count does not decrement as data is read out of the FIFO at the end of a trace run.
Table 18-20. CNT Bits
CNT Value Meaning
0000 No data valid
0001 1 word valid
0010 2 words valid
0011 3 words valid
0100 4 words valid
0101 5 words valid
0110 6 words valid
0111 7 words valid
1000 8 words valid