R01UH0136EJ0210 Rev.2.10
Page 602 of 800
Jul 31, 2012
M16C/64A Group
26. Consumer Electronics Control (CEC) Function
Figure 26.7
Data Bit Acceptable Range (CRRNG Bit = 1)
26.3.5.3
Error Determination
If the data bit is out of the acceptable range, a receive error occurs. The operations when the receive
error occurs are as follows:
•
The CRERRFLG bit in the CECFLG register becomes 1 (receive error)
•
A 3.6 ms low-level pulse is output when the CABTEN bit in the CECC4 register is 1 (low pulse
output enabled in receive error). However, this pulse is not output if an error occurs in the start bit.
Low pulse output timing can be selected by setting the CABTWEN bit in the CECC4 register when
the CABTEN bit is 1 (low pulse output enabled in receive error).
CEC input
(input data: 0)
0 ms
1.5 ms
2.4 ms
When the CDATRNG bit is 0: ±200 µs
When the CDATRNG bit is 1: ±300 µs
±350 µs
±500 µs
Acceptable range
Acceptable range
Both edges are detected
CRRNG, CDATRNG: Bits in the CECC2 register
2.4 ms
0.6 ms
0 ms
CEC input
(input data: 1)
Acceptable range
±350 µs
±500 µs
Acceptable range
Both edges are detected
When the CDATRNG bit is 0: ±200 µs
When the CDATRNG bit is 1: ±300 µs
Summary of Contents for M16C/60 Series
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