Renesas M16C/60 Series, User Manual

Page: 179 / 853

R01UH0136EJ0210 Rev.2.10 Page 146 of 800
Jul 31, 2012
M16C/64A Group 11. Bus
11.3.5.4 Read and Write Signals
When the data bus is 16 bits wide, the read and write signals can be selected based on combinations
of
RD
,
BHE
, and
WR
, or combinations of
RD
,
WRL
, and
WRH
using the PM02 bit in the PM0 register.
When the data bus is 8 bits wide, use combinations of
RD
,
WR
, and
BHE
.
Table 11.6 lists Operation of the
RD
,
WRL
and
WRH
Signals. Table 11.7 lists Operation of the
RD
,
WR
and
BHE
Signals.
11.3.5.5 ALE Signal
The ALE signal is used to latch the address when a multiplexed bus space is accessed. Latch the
address at the falling edge of the ALE signal.
Figure 11.3 ALE Signal, Address Bus, and Data Bus
Table 11.6 Operation of the
RD
,
WRL
and
WRH
Signals
Data Bus Width
RD WRL WRH
Status of External Data Bus
16-bit
(BYTE pin input = low)
L H H Read data
H L H Write 1 byte of data to an even address
H H L Write 1 byte of data to an odd address
H L L Write data to both even and odd addresses
Table 11.7 Operation of the
RD
,
WR
and
BHE
Signals
Data Bus
Width
RD WR BHE
A0 Status of External Data Bus
16-bit
(BYTE pin
input = low)
H L L H Write 1 byte of data to an odd address.
L H L H Read 1 byte of data from an odd address.
H L H L Write 1 byte of data to an even address.
L H H L Read 1 byte of data from an even address.
H L L L Write data to both even and odd addresses.
L H L L Read data from both even and odd addresses.
8-bit
(BYTE pin
input = high)
H L
−
(1)
H or L Write 1 byte of data.
L H
−
(1)
H or L Read 1 byte of data.
Note:
1. Do not use.
When BYTE pin input is high When BYTE pin input is low
ALE
Address Data
Address
A0/D0 to A7/D7
A8 to A19
ALE
Address Data
Address
A1/D0 to A8/D7
A9 to A19
Address A0
When bits PM05 to PM04 in the PM0 register are 01b or 10b (the multiplexed bus is either the CS2 or CS1 area)
Address
When bits PM05 to PM04 in the PM0 register are 11b (the entire CS area is the multiplexed bus)
A8