R01UH0136EJ0210 Rev.2.10
Page 380 of 800
Jul 31, 2012
M16C/64A Group
20. Real-Time Clock
20.2.10 Real-Time Clock Hour Compare Data Register (RTCCHR)
The RTCCHR register is enabled when bits RTCCMP1 to RTCCMP0 in the RTCCR2 register are 01b,
10b, or 11b (any compare mode).
HCMP03-HCMP00 (First digit of hour compare data bit) (b3-b0)
HCMP11-HCMP10 (Second digit of hour compare data bit) (b5-b4)
When the H12H24 bit in the RTCCR1 register is 0 (12-hour mode), set a value between 00 and 11 by
the BCD codes. When the H12H24 bit in the RTCCR1 register is 1 (24-hour mode), set a value
between 00 and 23 by the BCD codes.
Write to these bits when the BSY bit in the RTCSEC register is 0 (not while data is updated).
PMCMP (a.m./p.m compare bit) (b6)
This bit is enabled when the H12H24 bit in the RTCCR1 register is either 0 (12-hour mode) or 1 (24-
hour mode). When the H12H24 bit is 1, set the following:
•
When bits HCMP11 to HCMP10 and HCMP03 to HCMP00 are 00 to 11, set the PMCMP bit to 0.
•
When bits HCMP11 to HCMP10 and HCMP03 to HCMP00 are 12 to 23, set the PMCMP bit to 1.
Write to this bit when the BSY bit in the RTCSEC register is 0 (not while data is updated).
b7 b6 b5 b4
b1
b2
b3
Real-Time Clock Hour Compare Data Register
Symbol
RTCCHR
Address
034Ah
Bit Symbol
RW
Reset Value
X000 0000b
b0
—
(b7)
a.m./p.m. compare bit
0 : a.m.
1 : p.m.
—
HCMP00
HCMP01
HCMP02
HCMP03
RW
RW
RW
RW
Bit Name
First digit of hour compare data bit
Function
Store compare data
Setting
Range
0 to 9
HCMP10
HCMP11
PMCMP
RW
RW
RW
Second digit of hour compare data bit
Store compare data
0 to 2
No register bit. If necessary, set to 0. The read value is undefined.
Summary of Contents for M16C/60 Series
Page 853: ...M16C 64A Group R01UH0136EJ0210...
