22
iPORT CL-GigE External Frame Grabber User Guide
Clamping voltage
Below -42 V, over +42 V
ESD protection
Up to class -4 (+/-15 kV)
EMI filtering
Serial ferrite bead 120 Ohm @ 100 MHz
Table 9: GPIO Single-Ended Input Specifications
Specifications
Input type
LVCMOS
TTL
Termination
100 K to CL-GigE GND
Low threshold
<0.8 V
<1.5 V
High threshold
>2.0 V
>3.5 V
Maximum delay
8 nsec
Minimum voltage
-0.5 V (absolute)
Maximum voltage
6.5 V (absolute)
ESD protection
Up to class -4 (+/-15 kV)
EMI filtering
Serial ferrite bead 120 Ohm @ 100 MHz
Table 10: GPIO Output Specifications
Specifications
Output type
LVCMOS
TTL
High level output
current
+/-24 mA
+/-32 mA
Output Voltage
High minimum
2.4 V (@24 mA)
3.8 V (@ 32 mA)
High maximum
3.5 V
5.3 V
Low maximum
0.55 V (@24 mA)
0.55 V (@ 32 mA)
Maximum delay
6.4 nsec
ESD protection
Up to class -4 (+/-15 kV)
EMI filtering
Serial ferrite bead 120 Ohm @ 100 MHz
Table 8: GPIO Differential Input Specifications (Continued)
Specifications
Input type
Differential
+/-24 V,
+/-30 V,
RS-422
Differential
LVDS, RS-422
with 100 Ohm
termination
Differential
used as single-
ended HVTTL/
HVCMOS
Differential used
as single-ended
LVCMOS
Differential
used as
single-ended
TTL
