EN 215
3139 785 31681
9.
Circuit- and IC description
PIN DESCRIPTION
Pin Name
Input/Output
Function
D G N D
G
Digital Ground
A G N D
G
Analog Ground
C L K I N _ A
I
Pixel Clock Input for HD (74.25MHz Only , PS Only (27MHz), SD Only
( 2 7 M H z ) .
C L K I N _ B
I
Pixel Clock Input. Requires a 27MHz reference clock for Progressive Scan
Mode or a 74.25MHz (74.1758MHz) reference clock in HDTV mode. This
Clock is only used in dual Modes.
C O M P 1 , 2
O
Compensation Pin for DACs. Connect 0.1uF Capacitor from COMP pin to
V
AA
.
DAC A
O
CVBS/ GREEN/ Y / Y analog output.
DAC B
O
Chroma/ BLUE/ U / Pb analog output.
DAC C
O
Luma/ RED/ V / Pr analog output.
DAC D
O
In SD onlyu mode: CVBS/Green/Y analog outptu, in HD only mode and
simultaneous HD/SD mode: Y/Green [HD] analog output.
DAC E
O
In SD onlyu mode: Luma/Blue/U analog outptu, in HD only mode and
simultaneous HD/SD mode: Pr/Red analog output.
D A C F
O
In SD onlyu mode: Chroma/Red/ V analog outptu, in HD only mode and
simultaneous HD/SD mode: Pb/Blue [HD] analog output.
P_HSYNC
I
Video Horizontal Sync Control Signal for HD in simultaneous Sd/HD
mode and HD mode only.
P_VSYNC
I
Video Vertical Sync Control Signal for HD in simultaneous SD/HD mode and
HD mode only.
P_BLANK
I
Video Blanking Control signal for HD in simultaneous SD/HD mode and HD
mode only.
S_BLANK
I
Video Blanking Control Signal for SD only.
S_HSYNC
I
Video Horizontal Sync Control Signal for SD only.
S_VSYNC
I
Video Vertical Sync Control Signal for SD only.
Y 9 - 0
I
SD or Progressive scan/ HDTV input port for Y data.
Input port for interleaved Progressive Scan data. The LSB is set up
on pin Y0. For 8-bit data input LSB is set up on Y2.
C 9 - C 0
I
Progressive Scan/ HDTV input port :4:4 input mode this port is used for
the Cb[Blue/U] data. The LSB is set up on pin C0. For 8-bit data input LSB is
set up on C2.
S 9 - S 0
I
SD or Progressive Scan/HDTV input port for Cr [Red/V] data in 4:4:4 input
mode. LSB is set up on pin S0. For 8-bit data input LSB is set up on S2.
RESET
I
This input resets the on-chip timing generator and sets the ADV7310/11
into Default Register setting. Reset is an active low signal.
R
SET1,2
I
A 3040 Ohms resistor must be connected from this pin to AGND and is used
to control the amplitudes of the DAC outputs.
S C L k
I
I2C Port Serial Interface Clock Input .