Page 170
14. Synchronous Serial Interface (SIO1)
14.3 Function
T
5CL8
Figure 14-11 Example of External Clock and MSB Receive Mode
(4) Receive error processing
Receive errors occur on the following situation. To protect SIO1RDB and the shift register con-
tents, the received data is ignored while the SIO1SR<RXERR> is “1”.
• Shift operation is finished before reading out received data from SIO1RDB at
SIO1SR<RXF> is “1” in an external clock operation.
If receive error occurs, set the SIO1CR<SIOS> to “0” for reading the data that received
immediately before error occurence. And read the data from SIO1RDB. Data in shift register
(at errors occur) can be read by reading the SIO1RDB again.
When SIO1SR<RXERR> is cleared to “0” after reading the received data, SIO1SR<RXF> is
cleared to “0”.
After clearing SIO1CR<SIOS> to “0”, when 8-bit serial clock is input to
SCK1
pin, receive
operation is stopped. To restart the receive operation, confirm that SIO1SR<SIOF> is cleared
to “0”.
If the receive error occurs, set the SIO1CR<SIOINH> to “1” for stopping the receive opera-
tion immediately. In this case, SIO1CR<SIOS>, SIO1SR register, SIO1RDB register and
SIO1TDB register are initialized.
Writing transmit
data C
Writing transmit
data B
Writing transmit
data A
C
B
A7 A6
A
A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 C7 C6 C5 C4 C3 C2 C1 C0
Start shift
operation
Start shift
operation
Start shift
operation
Clearing SIOS
Reading received data
SIO1CR<SIOS>
SIO1SR<SIOF>
SIO1SR<SEF>
SCK1
pin
SI1 pin
SIO1SR<RXF>
INTSIO1
interrupt
request
SIO1RDB
Summary of Contents for CEM2100/00
Page 2: ...2 ...
Page 3: ...BLOCK DIAGRAM ...
Page 4: ...WIRING DIAGRAM 4 ...
Page 5: ...CIRCUIT DIAGRAM MAIN BOARD 5 ...
Page 6: ...6 ...
Page 7: ......
Page 11: ...PCB LAYOUT MAIN BOARD TOP SIDE VIEW 11 ...
Page 12: ...PCB LAYOUT MAIN BOARD BOTTOM SIDE VIEW 12 ...
Page 13: ...PCB LAYOUT PANEL BOARD TOP SIDE VIEW ...
Page 14: ...14 PCB LAYOUT PANEL BOARD BOTTOM SIDE VIEW ...
Page 15: ...PCB LAYOUT REMOTE BOARD TOP SIDE VIEW 15 ...
Page 16: ...PCB LAYOUT REMOTE BOARD BOTTOM SIDE VIEW 16 ...
Page 17: ...PCB LAYOUT TUNER BOARD TOP SIDE VIEW 17 ...
Page 18: ...PCB LAYOUT TUNER BOARD BOTTOM SIDE VIEW 18 ...
Page 19: ...PCB LAYOUT SD BOARD TOP SIDE VIEW ...
Page 20: ...20 PCB LAYOUT CD CONNECTOR TOP SIDE VIEW ...
Page 21: ...PCB LAYOUT ISO BOARD BOTTOM SIDE VIEW 21 ...
Page 22: ...22 SET EXPLODER VIEW DRAWING ...
Page 23: ...1 of 2 CEM2100 Trouble shooting Trouble shooting Trouble shooting Trouble shooting ...
Page 33: ...7 0 6SHFLILFDWLRQ 6 VWHP EORFN GLDJUDP ...
Page 110: ...7 0 6SHFLILFDWLRQ 5HYLVLRQ KLVWRU 2 2 s u 2 u 2 7 t 2 2 2 S S 5 2 v 2 2 ...
Page 111: ...8 Bit Microcontroller TLCS 870 C Series T5CL8 ...
Page 113: ...Revision History Date Revision 2008 7 31 1 First Release ...
Page 114: ......
Page 122: ...viii ...
Page 126: ...Page 4 1 3 Block Diagram T5CL8 1 3 Block Diagram Figure 1 2 Block Diagram ...
Page 130: ...Page 8 1 4 Pin Names and Functions T5CL8 ...
Page 155: ...Page 33 T5CL8 ...
Page 156: ...Page 34 2 Operational Description 2 3 Reset Circuit T5CL8 ...
Page 186: ...Page 64 5 I O Ports 5 8 Port P7 P77 to P70 T5CL8 ...
Page 194: ...Page 72 6 Watchdog Timer WDT 6 3 Address Trap T5CL8 ...
Page 214: ...Page 92 8 16 Bit TimerCounter 1 TC1 8 3 Function T5CL8 ...
Page 270: ...Page 148 12 Asynchronous Serial interface UART1 12 9 Status Flag T5CL8 ...
Page 280: ...Page 158 13 Asynchronous Serial interface UART2 13 9 Status Flag T5CL8 ...
Page 332: ...Page 210 16 Serial Bus Interface I2C Bus Ver D SBI 16 6 Data Transfer of I2C Bus T5CL8 ...
Page 342: ...Page 220 17 10 bit AD Converter ADC 17 6 Precautions about AD Converter T5CL8 ...
Page 354: ...Page 232 19 Flash Memory 19 4 Access to the Flash Memory Area T5CL8 ...
Page 388: ...Page 266 21 Input Output Circuit 21 2 Input Output Ports T5CL8 ...
Page 397: ...Page 275 T5CL8 23 Package Dimensions LQFP64 P 1010 0 50D Rev 01 Unit mm ...
Page 398: ...Page 276 23 Package Dimensions T5CL8 ...
Page 400: ......
Page 428: ...TC94B14MFG 2010 01 12 28 Package LQFP80 P 1212 0 50F Weight 0 6 g Typical ...