Omron NT15S, Operation Manual

Page: 182 / 233

168
Standard Mode
Section 4-21
4.21 Write Coordination Byte
The term Write Coordination Byte indicates that the controller writes to this byte.
The operating terminal only reads this byte.
Together with the Read Coordination Byte, this byte is used for the handshake
and for data coordination with the controller. Here, the controller reports its current
status to the terminal. The individual bits are independent of one another. The
Write Coordination Byte is the first byte of the cyclic poll area.
The structure is as illustrated below:
Write coordination byte LSB 0 1 2 3 4 5 6 7 MSB
External data release Bit ED
Refresh acknowledgement Bit RQ
Reset password
Liveness flag Bit LM
Data set download release DDF
not assigned
not assigned
not assigned
Fig. 21: Structure of the Write coordination byte
4.21.1 External Data Release (Bit ‘ED’)
The external data release can be used to determine, from the controller end, the
point of time from which editing of the value of a variable is allowed on the terminal.
A flashing Data Release key LED on the operating terminal indicates that an ex-
ternal data release has not yet been set. Editing of the value is therefore still inhib-
ited. Once the PLC has set the data release bit to logical 1, the Data Release LED
remains lit and a new value can be entered by the operator. After all modifications
have been made, the operating terminal sets the editing status bit back to logical 0,
thereby signaling that the editing process has been completed.
4.21.2 Refresh Acknowledgement (Bit ‘RQ’)
The refresh request bit is used to indicate to the controller that the values of the
variables in the current mask are to be refreshed. After the values have successful-
ly been transferred to the terminal, the controller sets the refresh acknowledge-
ment bit to logical 1 to indicate that the process has been completed. See chapter
5.20.3
Refresh Request Bit (Bit ‘RA’).
4.21.3 Resetting the Password
The password protection should be reactivated after the operator exits a password-
protected access level. This can be forced by the controller by setting the Reset
Password bit to logical 1.
4.21.4 Liveness Flag (Bit ‘LM’)
See chapter Liveness Flag of the Read Coordination Byte (5.20.4).