6-4
Section
AR Area
81
Address
Forced
set/reset
Controlled
by
Details
Function
Bits
AR 09
08
High-speed
counter 2
commands
High-speed
Counter
Start Bit
Same as for high-speed counter 1
commands.
User
Enabled
09
High-speed
Counter
Reset Bit
10
Measure-
ment Start
Bit (mea-
surement
mode 1)
Same as for high-speed counter 1
commands except that frequency
measurement is not possible with counter
2.
11
(Reserved by system.)
12
Range
Comparison
Result Clear
Bit
Same as for high-speed counter 1
commands.
13 to
15
(Reserved
by
system.)
---
---
AR 10
00 to
15
High-speed
counter 1
monitor
data
Range
comparison
result
The instruction execution result that is
output when the CTBL instruction is
executed for a range comparison is stored
here.
Bits 00 to 15: ON for each condition (from 1
to 16) that is satisfied.
OFF: Condition not satisfied
ON: Condition satisfied
Unit
AR 11
00 to
15
Output bit
pattern
The output bit pattern that is output when
the CTBL instruction is executed for a
range comparison is stored here.
Note: When more than one condition is
satisfied, the logical OR of all the output
patterns that satisfy the conditions is set.
AR 12
00 to
15
High-speed
counter 2
monitor
d t
Range
comparison
result
Same as for high-speed counter 1 monitor
data.
AR 13
00 to
15
data
Output bit
pattern
Summary of Contents for CS1 -
Page 1: ...Cat No W378 E1 1 Customizable Counter Units SYSMAC CS1 CS1W HI001 HCP22 HCA22 OPERATION MANUAL...
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Page 3: ...CS1W HIO01 HCP22 HCA22 Customizable Counter Units Operation Manual Produced January 2001...
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