4. Preparing for use
4.3. Installing
Pin
Name
Description
Pins 39 and 40 are internally connected
39
PWR_OUT_1
Power output 1; 5 V; 1 A
40
PWR_OUT_1
Power output 1; 5 V; 1 A
41
PWR_IN_0
Power input 0 that provides the voltage for the digi-
tal outputs OUT0 (pin 32), 1 (pin 31), 2 (pin 17) and 3
(pin 18); 5 to 24 V nom. (30 V max.)
42
PWR_IN_1
Power input 1 that provides the voltage for the digital
outputs OUT4 (pin 19), 5 (pin 20), 6 (pin 21) and 7
(pin 22); 5 to 24 V nom. (30 V max.)
43
PWR_IN_2
Power input 2 that provides the voltage for the digi-
tal outputs OUT8 (pin 23), 9 (pin 24), 10 (pin 25) and
11 (pin 26); 5 to 24 V nom. (30 V max.)
44
PWR_IN_3
Power input 3 that provides the voltage for the dig-
ital outputs OUT12 (pin 27), 13 (pin 28), 14 (pin 29)
and 15 (pin 30); 5 to 24 V nom. (30 V max.)
S
GGND
Frame ground
1k
220p
MAX367
protection
GND
ISO
+5 V
ISO
ADuM1400
ISO
input
Figure 4.7.: GPIO interface: Circuit diagram excerpt at input side
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