CHAPTER 8 TIMER/COUNTER FUNCTION
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User’s Manual U15109EJ3V0UD
8.4.4 Operation as 16-bit PWM output
By setting bit 6 (TMCn6) of 16-bit timer mode control register n0 (TMCn0) to 1, the timer operates as a PWM
output.
Pulses with the duty ratio determined by the value set to 16-bit compare register n (CRn) are output from TOn.
Set the width of the active level of the PWM pulse to CRn. The active level can be selected by bit 1 (TMCn01) of
TMCn0.
The count clock can be selected by bits 0 to 2 (TCLn0 to TCLn2) of timer clock select register n0 (TCLn0) and by
bit 0 (TCLn3) of timer clock select register n1 (TCLn1).
The PWM output can be enabled and disabled by bit 0 (TOEn0) of TMCn0.
Caution
CRn can be rewritten only once in one period while in the PWM mode.
Remark
n = 5, 6
(1) Basic operation of PWM output
Setting method
(1) Set the port latch and port mode register n to 0.
(2) Set the active level width to 16-bit compare register n (CRn).
(3) Select the count clock using timer clock select register n0, n1 (TCLn0, TCLn1).
(4) Set the active level to bit 1 (TMCn01) of TMCn0.
(5) If bit 7 (TCEn0) of TMCn0 is set to 1, counting starts. To stop counting, set TCEn0 to 0.
PWM output operation
(1) When counting starts, PWM output (output from TOn) outputs the inactive level until an overflow occurs.
(2) When an overflow occurs, the active level specified in step (1) in the setting method is output. The active
level is output until CRn and the count value of 16-bit counter n (TMn) match.
(3) PWM output after the CRn and count values match is at the inactive level until an overflow occurs again.
(4) Steps (2) and (3) repeat until counting stops.
(5) If counting is stopped by TCEn0 = 0, PWM output goes to the inactive level.
Remark
n = 5, 6
