NEC mPD789101, User Manual

Page: 152 / 265

CHAPTER 12 10-BIT A/D CONVERTER (
µ
PD789114, 789134 SUBSERIES)
User’s Manual U13045EJ2V0UM00
152
12.3 Registers Controlling 10-Bit A/D Converter
The following two registers are used to control the 10-bit A/D converter.
• A/D converter mode register 0 (ADM0)
• A/D input select register 0 (ADS0)
(1) A/D converter mode register 0 (ADM0)
ADM0 specifies the conversion time for analog inputs. It also specifies whether to enable conversion.
ADM0 is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input clears the ADM0 to 00H.
Figure 12-2. Format of A/D Converter Mode Register 0
Notes 1. The specifications of FR02, FR01, and FR00 must be such that the A/D conversion time is at least
14
µ
s.
2. These bit combinations must not be used, as the A/D conversion time will fall below 14
µ
s.
Cautions 1. The result of conversion performed immediately after bit 7 (ADCS0) is set is undefined.
2. The result of conversion after ADCS0 is cleared may be undefined (for details, refer to
12.5 (5) Timing when A/D conversion result becomes undefined).
Remark f
X
: System clock oscillation frequency (ceramic/crystal oscillation)
f
CC
: System clock oscillation frequency (RC oscillation)
A/D conversion control
ADCS0 0 FR02 FR01 FR00 0 0 0 ADM0
Symbol Address After reset R/W
FF80H 00H R/W
<7> 6 5 4 3 2 1 0
ADCS0
0
1
A/D conversion time selection
Note 1
FR02
0
0
0
1
1
1
144/f
X
120/f
X
96/f
X
72/f
X
60/f
X
48/f
X
FR01
0
0
1
0
0
1
(28.8 s)
(24 s)
(19.2 s)
(14.4 s)
(Setting prohibited
Note 2
)
(Setting prohibited
Note 2
)
(36 s)
(30 s)
(24 s)
(18 s)
(15 s)
(Setting prohibited
Note 2
)
µ
µ
µ
FR00
0
1
0
0
1
0
Other than above
Conversion disabled
Conversion enabled
Setting prohibited
µ
144/f
CC
120/f
CC
96/f
CC
72/f
CC
60/f
CC
48/f
CC
µ
µ
µ
µ
µ
At f
CC
= 4.0-MHz operation At f
X
= 5.0-MHz operation