User’s Manual U13045EJ2V0UM00
88
CHAPTER 6 CLOCK GENERATOR (
µ
PD789104, 789114 SUBSERIES)
6.3 Register Controlling Clock Generator
The clock generator is controlled by the following register:
• Processor clock control register (PCC)
(1) Processor clock control register (PCC)
PCC sets the CPU clock selection and the ratio of division.
PCC is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets PCC to 02H.
Figure 6-2. Processor Clock Control Register Format
Caution Bit 0 and bits 2 to 7 must be set to 0.
Remarks
1. f
X
: System clock oscillation frequency
2. Values in parentheses are when operating at f
X
= 5.0 MHz.
3. Minimum instruction execution time: 2f
CPU
• When f
CPU
= 0.2
µ
s: 0.4
µ
s
• When f
CPU
= 0.8
µ
s: 1.6
µ
s
0
0
0
0
0
0
PCC1
0
PCC
Symbol
Address
After reset
R/W
FFFBH
02H
R/W
7
6
5
4
3
2
1
0
PCC1
CPU clock (f
CPU
) selection
0
1
f
X
f
X
/2
2
(0.2 s)
(0.8 s)
µ
µ
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