NEC mPD789101, User Manual

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CHAPTER 4 CPU ARCHITECTURE
User’s Manual U13045EJ2V0UM00
4.2.3 Special function registers (SFRs)
Unlike general registers, special function registers have their own functions and are allocated to the 256-byte area
FF00H to FFFFH.
Special function registers can be manipulated, like general registers, with operation, transfer, and bit manipulation
instructions. The bit units in which one register can be manipulated (1, 8, and 16) differ depending on the special
function register type.
Each bit unit for manipulation can be specified as follows.
• 1-bit manipulation
A symbol reserved by assembler is described as the operand (sfr.bit) of a 1-bit manipulation instruction. This
manipulation can also be specified with an address.
• 8-bit manipulation
A symbol reserved by assembler is described as the operand (sfr) of an 8-bit manipulation instruction. This
manipulation can also be specified with an address.
• 16-bit manipulation
A symbol reserved by assembler is described as the operand of a 16-bit manipulation instruction. When
specifying an address, describe an even address.
Table 4-3 lists the special function registers. The meanings of the symbols in this table are as follows:
• Symbol
Indicates the addresses of the implemented special function registers. The symbols shown in this column are
the reserved words of the assembler, and have already been defined in the header file called “sfrbit.h” of the
C compiler. Therefore, these symbols can be used as instruction operands if assembler or integrated debugger
is used.
• R/W
Indicates whether the special function register in question can be read or written.
R/W: Read/write
R: Read only
W: Write only
• Bit units for manipulation
Indicates the bit units (1, 8, and 16) in which the special function register in question can be manipulated.
• After reset
Indicates the status of the special function register when the RESET signal is input.