NEC mPD789101, User Manual

Page: 180 / 265

CHAPTER 13 SERIAL INTERFACE 20
User’s Manual U13045EJ2V0UM00
180
(d) Baud rate generator control register 20 (BRGC20)
BRGC20 is set with an 8-bit memory manipulation instruction.
RESET input clears BRGC20 to 00H.
Cautions 1. When writing to BRGC20 is performed during a communication operation, the output of
baud rate generator is disrupted and communications cannot be performed normally. Be
sure not to write to BRGC20 during communication operation.
2. Be sure not to select n = 1 during an operation at f
X
= 5.0 MHz because n = 1 exceeds
the baud rate limit.
3. When the external input clock is selected, set port mode register 2 (PM2) to input mode.
Remarks 1. f
X
: System clock oscillation frequency (ceramic/crystal oscillation)
2. n: Values specified by the setting in TPS200 to TPS203 (1
≤
n
≤
8)
3. Values in parentheses apply to operation with f
X
= 5.0 MHz.
TPS203
0
0
0
0
0
0
0
0
1
TPS203 TPS202 TPS201 TPS200 0 0 0 0 BRGC20
R/W
FF73H 00H R/W
7 6 5 4 3 2 1 0
TPS202
0
0
0
0
1
1
1
1
0
f
X
/2
f
X
/2
2
f
X
/2
3
f
X
/2
4
f
X
/2
5
f
X
/2
6
f
X
/2
7
f
X
/2
8
(2.5 MHz)
(1.25 MHz)
(625 kHz)
(313 kHz)
(156 kHz)
(78.1 kHz)
(39.1 kHz)
(19.5 kHz)
TPS201
0
0
1
1
0
0
1
1
0
TPS200
0
1
0
1
0
1
0
1
0
n
1
2
3
4
5
6
7
8
–
Setting prohibited
Symbol
Address After reset
3-bit counter source clock selection
Input clock from external to ASCK20 pin.
Other than above