NEC mPD789026 Subseries, User Manual

Page: 138 / 213

CHAPTER 9 SERIAL INTERFACE 00
User's Manual U11919EJ3V0UM00
138
Table 9-5. Example of Relationship between System Clock and Baud Rate
Error (%) Baud Rate (bps) n BRGC00 Set Value
f
X
= 5.0 MHz f
X
= 4.9152 MHz
1,200 8 70H
2,400 7 60H
4,800 6 50H
9,600 5 40H
19,200 4 30H
38,400 3 20H
76,800 2 10H
1.73 0
Caution Be sure not to select n = 1 during an operation at f
X
= 5.0 MHz because n = 1 exceeds
the baud rate limit.
(ii) Generation of baud rate transmit/receive clock by means of external clock from ASCK pin
The transmit/receive clock is generated by scaling the clock input from the ASCK pin. The baud
rate generated from the clock input from the ASCK pin is estimated by using the following
expression.
[Baud rate] = [Hz]
f
ASCK
: Frequency of clock input to the ASCK pin
Table 9-6. Relationship between ASCK Pin Input Frequency
and Baud Rate (When BRGC00 is Set to 80H)
Baud Rate (bps) ASCK Pin Input Frequency (kHz)
75 1.2
150 2.4
300 4.8
600 9.6
1,200 19.2
2,400 38.4
4,800 76.8
9,600 153.6
19,200 307.2
31,250 500.0
38,400 614.4
f
ASCK
16