NEC mPD789026 Subseries, User Manual

Page: 187 / 213

CHAPTER 14 INSTRUCTION SET
User's Manual U11919EJ3V0UM00
187
14.2 Operation List
Flag Mnemonic Operands Byte Clock Operation
Z AC CY
r,#byte 3 6 r
←
byte
saddr,#byte 3 6 (saddr)
←
byte
sfr,#byte 3 6 sfr
←
byte
A,r
Note 1
2 4 A
←
r
r,A
Note 1
2 4 r
←
A
A,saddr 2 4 A
←
(saddr)
saddr,A 2 4 (saddr)
←
A
A,sfr 2 4 A
←
sfr
sfr,A 2 4 sfr
←
A
A,!addr16 3 8 A
←
(addr16)
!addr16,A 3 8 (addr16)
←
A
PSW,#byte 3 6 PSW
←
byte
× × ×
A,PSW 2 4 A
←
PSW
PSW,A 2 4 PSW
←
A
× × ×
A,[DE] 1 6 A
←
(DE)
[DE],A 1 6 (DE)
←
A
A,[HL] 1 6 A
←
(HL)
[HL],A 1 6 (HL)
←
A
A,[HL+byte] 2 6 A
←
(HL+byte)
MOV
[HL+byte],A 2 6 (HL+byte)
←
A
A,X 1 4 A
↔
X
A,r
Note 2
2 6 A
↔
r
A,saddr 2 6 A
↔
(saddr)
A,sfr 2 6 A
↔
sfr
A,[DE] 1 8 A
↔
(DE)
A,[HL] 1 8 A
↔
(HL)
XCH
A,[HL+byte] 2 8 A
↔
(HL+byte)
Notes 1. Except r = A.
2. Except r = A, X.
Remark One instruction clock cycle is one CPU clock cycle (f
CPU
) selected by processor clock control register
(PCC).