NEC mPD789026 Subseries, User Manual

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CHAPTER 3 CPU ARCHITECTURE
User's Manual U11919EJ3V0UM00
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(a) Interrupt enable flag (IE)
This flag controls interrupt request acknowledge operations of the CPU.
When IE = 0, the interrupt disabled (DI) status is set. All interrupt requests except non-maskable
interrupt are disabled.
When IE = 1, the interrupt enabled (EI) status is set and interrupt request acknowledgement is controlled
with an interrupt mask flag for each interrupt source.
This flag is reset to 0 upon DI instruction execution or interrupt acknowledgment and is set to 1 upon EI
instruction execution.
(b) Zero flag (Z)
When the operation result is zero, this flag is set to 1. It is reset to 0 in all other cases.
(c) Auxiliary carry flag (AC)
If the operation result has a carry from bit 3 or a borrow at bit 3, this flag is set to 1. It is reset to 0 in all
other cases.
(d) Carry flag (CY)
This flag stores overflow and underflow upon add/subtract instruction execution. It stores the shift-out
value upon rotate instruction execution and functions as a bit accumulator during bit operation instruction
execution.