NEC mPD780852 Series, Preliminary User'S Manual

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CHAPTER 3 CPU ARCHITECTURE
Preliminary User’s Manual U14581EJ3V0UM00
3.4.7 Based addressing
[Function]
8-bit immediate data is added as offset data to the contents of the base register, that is, the HL register pair in
an instruction word of the register bank specified with the register bank select flags (RBS0 and RBS1) and the
sum is used to address the memory. Addition is performed by expanding the offset data as a positive number
to 16 bits. A carry from the 16th bit is ignored. This addressing can be carried out for all the memory spaces.
[Operand format]
Identifier Description
— [HL + byte]
[Description example]
MOV A, [HL + 10H]; when setting byte to 10H
Operation code 1 0 1 0 1 1 1 0
0 0 0 1 0 0 0 0
3.4.8 Based indexed addressing
[Function]
The B or C register contents specified in an instruction word are added to the contents of the base register, that
is, the HL register pair in an instruction word of the register bank specified with the register bank select flags
(RBS0 and RBS1) and the sum is used to address the memory. Addition is performed by expanding the B or
C register contents as a positive number to 16 bits. A carry from the 16th bit is ignored. This addressing can
be carried out for all the memory spaces.
[Operand format]
Identifier Description
— [HL + B], [HL + C]
[Description example]
In the case of MOV A, [HL + B]
Operation code 1 0 1 0 1 0 1 1