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CHAPTER 18 METER CONTROLLER/DRIVER
Preliminary User’s Manual U14581EJ3V0UM00
18.4.3 1-bit addition circuit operation
Figure 18-7. Timing in 1-Bit Addition Circuit Operation
The 1-bit addition mode repeats 1-bit addition/non-addition to PWM output alternately upon MCNT overflow output,
and enables the state of PWM output between current compare value N and the next compare value N + 1. In this
mode, 1-bit addition to the PWM output is set by setting ADBn of the MCMPCn register to 1, and 1-bit non-addition
(normal output) is set by setting ADBn to 0.
Remark
n = 1 to 4
MCNT value
OVF (overflow)
Match signal of
expected value N
PWM output of
expected value N
(1-bit non-addition)
PWM output of
expected value N
(1-bit addition)
PWM output of
expected value N + 1
(1-bit non-addition)
FFH
00H
01H
N
Summary of Contents for mPD780852 Series
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