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CHAPTER 3 CPU ARCHITECTURE
Preliminary User’s Manual U14581EJ3V0UM00
Address
Special-Function Register (SFR) Name
Symbol
R/W
Manipulatable Bit Unit
After Reset
1 Bit
8 Bits
16 Bits
FF80H
A/D converter mode register
ADM1
R/W
—
00H
FF81H
Analog input channel specification register
ADS1
—
FF82H
Power-fail compare mode register
PFM
—
FF83H
Power-fail compare threshold value register
PFT
—
FF84H
Serial operation mode register 3
CSIM3
—
FF85H
Asynchronous serial interface mode register
ASIM
—
FF86H
Asynchronous serial interface status register
ASIS
R
—
—
FF87H
Baud rate generator control register
BRGC
R/W
—
—
FF89H
D/A converter mode register
Note 1
DAM1
W
—
FF94H
Sound generator control register
SGCR
R/W
—
FF95H
Sound generator buzzer control register
SGBR
—
FF96H
Sound generator amplitude register
SGAM
—
FF98H
Serial operation mode register 2
CSIM2
—
FF99H
Serial receive data buffer register
SIRB2
—
—
Undefined
FF9AH
Serial receive data buffer status register
SRBS2
—
—
00H
FFA0H
Oscillator mode register
Note 2
OSCM
—
FFB0H
LCD display mode register
LCDM
—
FFB2H
LCD display control register
LCDC
—
FFE0H
Interrupt request flag register 0L
IF0
IF0L
FFE1H
Interrupt request flag register 0H
IF0H
FFE2H
Interrupt request flag register 1L
IF1L
—
FFE4H
Interrupt mask flag register 0L
MK0 MK0L
FFH
FFE5H
Interrupt mask flag register 0H
MK0H
FFE6H
Interrupt mask flag register 1L
MK1L
—
FFE8H
Priority specify flag register 0L
PR0
PR0L
FFE9H
Priority specify flag register 0H
PR0H
FFEAH
Priority specify flag register 1L
PR1L
—
FFF0H
Memory size switching register
IMS
—
—
CFH
Note 3
FFF4H
Internal expansion RAM size switching register
IXS
—
—
0CH
Note 4
FFF9H
Watchdog timer mode register
WDTM
—
00H
FFFAH
Oscillation stabilization time select register
OSTS
—
—
04H
FFFBH
Processor clock control register
PCC
—
Notes 1. DAM0 is a register that must be set when debugging the
µ
PD780852 with an in-circuit emulator (IE-78K0-
NS). Set this register when emulating a power-fail detection function.
2.
µ
PD780851(A), 780852(A) only
3. The initial value of this register is CFH. Set the following value to this register of each model.
µ
PD780851(A): C8H
µ
PD780852(A): CAH
µ
PD78F0852 (to set the same memory map as
µ
PD780851(A)): C8H
µ
PD78F0852 (to set the same memory map as
µ
PD780852(A)): CAH
4. Although the initial value of this register is 0CH, set this register to 0BH.
Table 3-3. Special-Function Register List (3/3)
Summary of Contents for mPD780852 Series
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