System Specifications C-5
PIIX4 South Bridge allows PCI masters to achieve
full PCI bandwidth.
Integrated 8x32-bit buffer for bus master PCI IDE
burst transfers.
Bus Master Mode.
Post write and read prefetch buffers are integrated
for increased performance.
Enhanced DMA Controller supports PCI DMA with
3 PC/PCI channels and distributed DMA protocols.
Fast type-F DMA for reduced PCI bus usage.
Interrupt Controller programmable for edge/level
sensitivity; supports 15 interrupts.
Power Management logic (sleep/resume logic).
Real-Time Clock w/ 256-byte battery-backed
CMOS SRAM.
Two fast IDE interfaces support up to four IDE
drives or devices.
Universal Serial Bus (USB) Support
Two external USB ports support USB peripheral devices.
The system board supports standard universal host
controller interface (UHCI) with UHCI-compatible software
drivers.
Support for isochronous and asynchronous transfer
types.
Automatic mapping of function to driver and
configuration.
Error handling and fault recovery mechanisms built into
protocol.
