viii
Z85230 ESCC and Z8536 CIO Registers and Port Pins .................................. 1-44
Z8536/Z85230 Registers ........................................................................... 1-45
Z8536 CIO Port Pins ................................................................................. 1-46
ISA DMA Channels ......................................................................................... 1-49
CHAPTER 2
Raven PCI Host Bridge & Multi-Processor Interrupt Controller
Chip
Introduction ............................................................................................................... 2-1
Overview ............................................................................................................ 2-1
Requirements...................................................................................................... 2-2
Features .............................................................................................................. 2-2
Block Diagram........................................................................................................... 2-4
Functional Description .............................................................................................. 2-5
MPC Bus Interface ............................................................................................. 2-5
MPC Arbiter................................................................................................ 2-5
MPC Map Decoders .................................................................................... 2-7
MPC Write Posting ..................................................................................... 2-8
MPC Master ................................................................................................ 2-9
MPC Bus Timer ........................................................................................ 2-10
PCI Interface..................................................................................................... 2-11
PCI Map Decoders .................................................................................... 2-11
PCI Configuration Space........................................................................... 2-12
PCI Write Posting ..................................................................................... 2-12
PCI Master ................................................................................................ 2-13
Generating PCI Memory and I/O Cycles ......................................................... 2-13
Generating PCI Configuration Cycles.............................................................. 2-15
Generating PCI Special Cycles ........................................................................ 2-15
Generating PCI Interrupt Acknowledge Cycles ............................................... 2-16
Endian Conversion ........................................................................................... 2-16
When MPC Devices are Big-Endian......................................................... 2-16
When MPC Devices are Little Endian ...................................................... 2-17
Cycles Originating From PCI.................................................................... 2-18
Error Handling.................................................................................................. 2-18
PCI/MPC Contention Handling........................................................................ 2-20
Registers .................................................................................................................. 2-22
MPC Registers.................................................................................................. 2-22
Vendor ID/Device ID Registers ................................................................ 2-24
Revision ID Register ................................................................................. 2-24
General Control-Status/Feature Registers................................................. 2-25
MPC Arbiter Control Register .................................................................. 2-28
Prescaler Adjust Register .......................................................................... 2-29
Summary of Contents for MVME2700 Series
Page 1: ...MVME2600 2700 Series Single Board Computer Programmer s Reference Guide V2600A PG2 ...
Page 13: ...xiv ...
Page 15: ...xvi ...
Page 67: ...1 50 Board Description and Memory Maps 1 ...
Page 151: ...2 84 Raven PCI Host Bridge Multi Processor Interrupt Controller Chip 2 ...
Page 215: ...3 64 Falcon ECC Memory Controller Chip Set 3 ...
Page 277: ...Glossary GL 14 G L O S S A R Y ...