Micro-g LaCoste FG5, Manual, Page: 86 / 168

Adjustment and Maintenance
4
4.4.1.3.Scaler-Counter Printed Circuit Board
The scaler-counter board has several major functional blocks:
1. Clock discriminator
2. Clock scaling
3. Scaled clock count accumulator
4. Fringe scaling
5. Scaled fringe accumulator
6. Accumulator/computer data latching
7. Miscellaneous I/O interface circuitry
The incoming clock signal is converted to TTL levels (1), and then scaled (2)
according to a three-digit hexadecimal value selected with three PCB hex
switches. The scaled clock output of this circuit increments the 10-bit clock
accumulator (3) and is also sent to the UTIC via a BNC connector on the front
panel. Except that it does not need a TTL discriminator, the fringe scaling
circuit (4) is identical to that of the clock scaler. The scaled fringes are
counted by a 4-bit accumulator (5), and are passed on to the UTIC via a front
panel BNC connector.
The leading edge of the latch pulse from the UTIC latches (6) the current
values of the scaled clock and fringe accumulators into buffers, along with the
states of the "data_valid" and "up/down" status lines. The accumulators
themselves are then cleared by the trailing edge of the delayed latch. To
indicate data available for reading, an extended latch pulse is sent to the
computer.
A control line from the computer, /DIS, disables the fringe output to the
UTIC so that an incoming fringe cannot retrigger the UTIC until after the
computer has finished its current data read operation.
4-28
Several other signals are routed to and from the computer through the scaler-
counter board. They are specified in Table 4-2.