Errata
40
Specification Update
AN68.
BTM/BTS Branch-From Instruction Address May Be
Incorrect for Software Interrupts
Problem:
When BTM (Branch Trace Message) or BTS (Branch Trace Store) is enabled, a
software interrupt may result in the overwriting of BTM/BTS branch-from instruction
address by the LBR (Last Branch Record) branch-from instruction address.
Implication:
A BTM/BTS branch-from instruction address may get corrupted for software interrupts.
Workaround:
None identified.
Status:
For the steppings affected, see the
AN69.
Erratum removed
AN70.
Single Step Interrupts with Floating Point Exception Pending May Be
Mishandled
Problem:
In certain circumstances, when a floating point exception (#MF) is pending during
single-step execution, processing of the single-step debug exception (#DB) may be
mishandled.
Implication:
When this erratum occurs, #DB will be incorrectly handled as follows
•
#DB is signaled before the pending higher priority #MF (Interrupt 16)
•
#DB is generated twice on the same instruction
Workaround:
None identified
Status:
For the steppings affected, see the
AN71.
Fault on ENTER Instruction May Result in Unexpected Values on Stack
Frame
Problem:
The ENTER instruction is used to create a procedure stack frame. Due to this erratum,
if execution of the ENTER instruction results in a fault, the dynamic storage area of
the resultant stack frame may contain unexpected values (i.e. residual stack data as a
result of processing the fault).
Implication:
Data in the created stack frame may be altered following a fault on the ENTER
instruction. Please refer to “Procedure Calls For Block-Structured Languages” in the
Intel® 64 and IA-32 Architectures Software Developer's Manual, Volume 1: Basic
Architecture, for information on the usage of ENTER instructions. This erratum is not
expected to occur in ring 3. Faults are usually processed in ring 0 and stack switch
occurs when transferring to ring 0. Intel has not observed this erratum on any
commercially-available software.
Workaround:
None identified.
Status:
For the steppings affected, see the
