Errata
26
Specification Update
AN26.
VERW/VERR/LSL/LAR Instructions May Unexpectedly Update the
Last Exception Record (LER) MSR
Problem:
The LER MSR may be unexpectedly updated, if the resultant value of the Zero Flag
(ZF) is zero after executing the following instructions:
VERR (ZF=0 indicates unsuccessful segment read verification)
VERW (ZF=0 indicates unsuccessful segment write verification)
LAR (ZF=0 indicates unsuccessful access rights load)
LSL (ZF=0 indicates unsuccessful segment limit load)
Implication:
The value of the LER MSR may be inaccurate if VERW/VERR/LSL/LAR instructions are
executed after the occurrence of an exception.
Workaround:
Software exception handlers that rely on the LER MSR value should read the LER MSR
before executing VERW/VERR/LSL/LAR instructions.
Status:
For the steppings affected, see the
AN27.
General Protection (#GP) Fault May Not Be Signaled on Data
Segment Limit Violation above 4-G Limit
Problem:
Memory accesses to flat data segments (base = 00000000h) that occur above the 4G
limit (0ffffffffh) may not signal a #GP fault.
Implication:
When such memory accesses occur, the system may not issue a #GP fault.
Workaround:
Software should ensure that memory accesses do not occur above the 4G limit
(0ffffffffh).
Status:
For the steppings affected, see the
AN28.
Performance Monitoring Events for Retired Floating Point Operations
(C1h) May Not Be Accurate
Problem:
Performance monitoring events that count retired floating point operations may be too
high.
Implication:
The Performance Monitoring Event may have an inaccurate count.
Workaround:
None identified.
Status:
