DOC E10523 Rev.D
Interactive Circuits And Systems Ltd. 2000
57
TABLE 6.4 FPDP Signal Descriptions
Signal/s
Signal Name
Description
D31:00
Data Bus
32 bit data bus driven by the data source.
DIR*
Data Direction
The data source asserts DIR* low.
DVALID*
Data Valid
When asserted, DVALID* indicates that the data bus has
valid data. This signal is generated by the data source with
each data sample.
STROB
Data Strobe
STROB is a free running clock supplied by the data
source. The receiving end should clock the data with the
rising edge of STROB.
NRDY*
Not Ready
NRDY* is asserted by the receiver when it is not ready to
receive data. The data source must sample this signal
until the receiver brings it high, at which time the transfer
can commence. Since NRDY* is asynchronous to STROB,
the data source should double-synchronize to it before
sampling its state; this avoid metastability problems.
PIO1,PIO2
Prog. I/O
The PIO signals are programmable I/O lines for user-
defined functions. They can be configured as inputs or
outputs.
PSTROBE
+ PECL Data Strobe
This signal along with PSTROBE* are generated by the
data source as an optional differential PECL (Positive
Emitter-Coupled Logic) data strobe. PSTROBE is the
positive version of the differential clock and has the same
polarity as STROB. For high data rate applications, the
differential PECL data strobe should be used instead of
STROB. The user must configure the board appropriately;
see section 4.2.
PSTROBE*
- PECL Data Strobe
This signal is the negative version of the differential PECL
data strobe.
RESERVED
Do not connect to reserved signals.
SUSPEND*
Suspend Data
SUSPEND* is generated by the receiver to inform the data
source of a pending FIFO overflow condition. The data
source is allowed as many as 16 cycles before suspending
the transfer. Since SUSPEND* is asynchronous to
STROB, the data source should be double-synchronized
to it before sampling its state; this avoids metastability
problems.
SYNC*
Sync Pulse
The data source can provide a sync pulse to the receiver
to synchronize data transfers. The receiver waits for the
sync pulse before accepting data. The receiver starts
accepting data on the first Data Valid period following the
sync pulse.