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DOC E10523 Rev.D
Interactive Circuits And Systems Ltd. 2000
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programmed in bit 0. Note that the frequency programmed must be the oversampling
frequency rather than the output rate. See section 6.2 for details of programming the
oscillator.
5.14 FPDP Clock Frequency Register
Write Only
This register allows the user to program the FPDP Strobe (clock) frequency, when the
FPDP is used for output. This is done by writing a 22-bit programming word to the on-board
programmable oscillator. Data is written serially to the oscillator, least significant bit first.
One write must occur for each bit of data to be written to the oscillator, with the data to be
programmed in bit 0. See section 6.2 for details of programming the oscillator Clock
Generator. The theoretical minimum FPDP Strobe frequency required is the sample output
rate multiplied by the number of channels selected; this value can be divided by two is
packed output mode is used (see section 5.7.6). The actual frequency used must be at
least 15% higher than the calculated minimum. Under certain conditions (e.g. small frame
sizes), it may be necessary to further increase the Strobe frequency used.
5.15 Arm Register
Write Only
Writing to this register initiates pre-storage of data when the ICS-130 is used in Capture
mode with pre-trigger storage. See section 3.4 for details on using pre-trigger storage.
5.16 ADC Reset Register
Write only
A write to this register resets the ADC swing buffer memory pointers. It does not alter
memory contents or the values of control registers. The value written to the register is
unimportant. This register must be written to after configuring the ADC section and before
enabling acquisition in order for the Swing Buffer memory to be correctly initialized.