DOC E10523 Rev.D
Interactive Circuits And Systems Ltd. 2000
37
5.11 Decimation Count Register
Read/Write
This register programs the eight bit decimation count. The real output rate is the ADC
output rate divided by the decimation factor. The decimation factor is one greater than the
value written to this register. Therefore, setting this register to zero disables decimation,
while writing one to this register will result in decimation by a factor of 2. This feature
enables the output rate to be reduced, allowing operation of the ICS-130 with an effective
sample output rate below 31.25 kHz. However, the user is cautioned that decimating the
output in this way counteracts the advantages of the Sigma-Delta technology of the
converters. The valid range of numbers that may be programmed to this register is 0 to 255,
corresponding to decimation factors of 1 to 256.
The user must perform an ADC Reset (by writing to the ADC Reset register) after loading
the Buffer Length, Acquisition Count, Decimation and Frame Count registers in order for the
new values to take effect.
5.12 Frame Count Register
Read/Write
Data for output to the FPDP and P2 interfaces is stored in two FIFO buffers which are
arranged in a swing buffer mode of operation (see Fig. 1). One buffer receives the acquired
data while the other is the source for the data transmitted on the FPDP and/or P2 interface.
When the acquisition path completes the writing of N acquisition frames (a frame consists
of a sample for each active channel), the two buffers are automatically swapped. In general,
the user should use a frame count of one. The valid range of numbers that may be
programmed to this register is 1 to 255.
The user must perform an ADC Reset (by writing to the ADC Reset register) after loading
the Buffer Length, Acquisition Count, Decimation and Frame Count registers in order for the
new values to take effect.
5.13 ADC Clock Frequency Register
Write Only
This register allows the user to program the internal sampling (conversion) frequency. This
is done by writing a 22-bit programming word to the on-board programmable oscillator.
Data is written serially to the oscillator, least significant bit first. One write to the register
must occur for each bit of data to be written to the oscillator, with the data to be
