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2 System Board - (SiS Chipset) (Part Number: D4051-63001)
SiS Chipset
Play port. The PSIO supports two bus master IDE channels providing up to four
IDE devices. The PSIO does not require any IDE buffering to be used, and
therefore no IDE buffers are used.
The SiS 5513 chip consists of:
•
A PCI bridge that translates PCI cycles onto the ISA bus.
•
ISA master/DMA device that translates cycles onto the PCI bus.
•
A seven-channel programmable DMA controller.
•
A sixteen-level programmable interrupt controller.
•
A programmable timer with three counters.
•
An onboard Plug and Play port.
•
A built-in PCI master/slave IDE interface.
The PSIO PCI bus interface provides the interface between PSIO and the PCI
bus. It contains both PCI master and slave bridges to the PCI bus. As a PCI slave,
the PSIO responds to both I/O and memory transfers.
ISA Bus Controller
The PSIO ISA Bus Interface accepts cycles from the PCI bus interface and then
translates them for the ISA bus. It also requests the PCI master bridge to
generate PCI cycles on behalf of DMA or ISA master. The ISA bus interface
contains a standard ISA Bus Controller and a Data Buffering logic. The PSIO can
directly support six ISA slots without external data or address buffering.
DMA Controller
The PSIO contains a seven-channel DMA controller. The channel 0 to 3 is for 8-
bit DMA devices while channel 5 to 7 is for 16-bit devices. The channels can also
be programmed for any of the four transfer modes: The three active modes
(single, demand, block), can perform three different types of transfer: read,
write and verify. The address generation circuitry in the PSIO can only support a
24-bit address for DMA devices.
Interrupt Controller
The PSIO provides an ISA-compatible interrupt controller that incorporates the
functionality of two 82C59 interrupt controllers. The two controllers are
cascaded so that 14 external and two internal interrupts are supported.
Timer/Counter
The PSIO contains a three-channel counter/timer. The counters use a division of
14.31818 MHz OSC input as the clock source.
Summary of Contents for 520 5/XX
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