Harris Platinum Series, Technical Manual

Page: 139 / 158

If any phase or amplitude difference exists between the signal in
the upper and lower amplifier halves a voltage will develop
across R15.
This RF voltage will be coupled through toroidal transformer T9,
to CR1, an RF detector which produces a DC signal proportional
to the amount of imbalance. This DC signal is called the ISO
voltage sample, and it is sent to the PCM system through J1-2.
A.2.6
High Band Quarter Module
(Refer to High Band Quarter Module Schematic 839-7900-702)
The RF input to the quarter module passes through TL1 (Phase
setting coax) and AT1 (Attenuator which sets the gain of the
quarter module to 14.25 dB). The RF input then passes through
a two-way Wilkinson power divider, consisting of two 75 ohm
microstrip sections. R1 provides isolation between the divider
outputs.
The upper and lower amplifier halves on the schematic are
identical. In the upper amplifier, C9 couples RF into the amplifier
while blocking DC. T1 is a coaxial balun transformer, which
provides both a step-down impedance transformation and an
unbalanced-to-balanced transformation. Its two output signals
differ in phase by 180, which establishes push-pull operation in
the RF FET pair Q1 and Q2.
R3 and R4 shunt load the highly capacitive gate input impedance
of the FET’s. C2 completes the input impedance transformation.
An adjustable voltage divider feeds bias voltages to the gates of
the RF FET’s, controlling their quiescent drain currents.
Series induluctors feed 50 Volts to the FET drains, and act as RF
chokes, blocking the RF from appearing on the power supply
lines.
The sliding short section form small inductances. Together with
C4/C5/C37 they form a balanced L-net, which provides both a
low-pass response and an impedance step-up transformation
between the FET drains and the input of T3.
T3 is a coaxial balun, fabricated from semi-rigid coax. It adds
the output voltages of Q1 and Q2 in series, and continues the
output impedance transformation. Its outer conductor is
grounded by C13, and the RF output is coupled through C15.
The outputs of the two amplifier halves are recombined by a
two-way Wilkinson combiner, composed of two 75 ohm micros-
trip sections.
If any phase or amplitude difference exists between the signal in
the upper and lower amplifier halves, an RF voltage develop
across R11 and L9. L9 is the primary of a toroidal transformer,
whose secondary is L10. Any RF voltage will be coupled through
the toroidal transformer to R12/CR1/C33 an RF peak detector
which produces a DC signal proportional to the amount of
imbalance. This signal is called the ISO voltage sample, and it is
sent to the PCM system through J1-2.
A.2.7
Quarter Module Bias
(Refer to Lowband Quarter Module schematic 839-7900-701
and HighBand Quarter Module schematic 839-7900-702.
The +15 Volts for the FET bias voltage divider is furnished by a
step-down regulator in the Protection, Monitoring and Control
Subsystem. This regulated voltage switches with the switched 50
Volts.
Thermistor R1 is mounted to the heat sink between RF FETS Q2
and Q3 and completes a resistive voltage divider betewwn the
+15 Volts and ground. As the hestsink temperature increases the
resistance of the thermistor decreases.
The change in thermistor resistance changes the voltage refer-
ence for the bias adjustment. This change in reference tracks the
change in bias current with temperature. This proportional volt-
age is divided down by the four bias adjust controls R24, R25,
R26 and R27 for precise adjustment of the static current of the
individual RF FETS.
The reference voltage is also monitored by the module control
board, excessive heat sink temperature will result in a tempera-
ture fault. R2(HB)or R16(LB) is used to set the temperature trip
point. The voltage is factory adjusted for 5.30 Volts when the
heatsink temperature is 25C. Any adjustment of R2 or R16 will
affect the FET static current bias settings.
A.2.8
Protection, Control and Monitor Subsystem
(Refer to “Logic Printed Wiring” schematic, 839-7900-700.)
Each module is controlled and monitored by a module protec-
tion, control, and monitor (PCM) subsystem. Drivers and PA
modules utilize essentially the same PCM subsystem. It consists
of sensors and control logic within each module, and provides
protection against improper operating conditions. The heart of
the module PCM subsystem is a printed circuit assembly com-
monly known as the “module control board.”
The module control board performs protection from different
detrimental operating conditions through an essentially common
scheme. It collects voltage samples that provide indications of
the operating parameters, and compares these samples to refer-
ence voltages. Voltage comparators (U4, U6, U7, and U13) are
used to compare the samples to the references, and their outputs
are digital signals which indicate either a normal operating
condition or a fault.
These digital signals drive PALs (Programmable Array Logic)
(U1, U2, U3), which are ICs consisting of hundreds of digital
logic gates. The PALs perform two functions. They send signals
to the pass FETs, which are used as high-current switches to turn
on or off the 50 Volts DC supplied to the quarter modules. They
also determine the operating status indications given by the front
panel LEDs.
Upon a module ENABLE signal, after the cabinet DC power
supply reaches 44 Volts, the control logic turns on the pass FETs.
If a fault is detected, the control logic will turn off the pass FETs,
disabling the module.
The PCM subsystem performs several functions:
* Monitors input power level and protects the module from being
overdriven. A sample from the coupler at the input of the power
divider is received at J1-9. If the sample is above the reference
established by voltage divider R20-R21, U6 pin 14 will go low,
Appendix A - RF Amplifier Modules
10-16-95 (888-2365-001) (888-2377-001) (888-2378-001) A-5
WARNING: Disconnect primary power prior to servcing.