PSB-2000 Series User Manual
138
When receiving the *CLS command, the PSB
2000 series power supply unit clears the
standard event register and the status byte
register.
When MAV occurs.
The MAV bit is cleared when all the data is read
out from the output queue.
The output queue is not cleared by the *CLS
command.
When the event register and MAV are cleared
completely, MSS in bit 6 is also cleared.
Clear and Reset Statuses
Introduction
It is possible to cause clearing or resetting in the
PSB 2000 Series power supply unit by issuing
commands or executing specific operations.
IFC
(Interface clear)
Responses to the universal command, IFC, are as
shown below:
The specified talker or listener status is cleared.
The GPIB buffer, output queue and input
queued commands command remain
unchanged.
The SRQ remains unchanged.
The remote status and LLO (local lock out)
setting remain unchanged.
Panel setting remains unchanged.
DCL SDC
(Device clear)
Responses to the universal command, DCL, and
the address command, SDC, are as shown below:
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