Debug Module
MCF52277 Reference Manual, Rev. 1
32-24
Freescale Semiconductor
32.5.3.1
ColdFire BDM Command Format
All ColdFire family BDM commands include a 16-bit operation word followed by an optional set of one
or more extension words.
32.5.3.1.1
Extension Words as Required
Some commands require extension words for addresses and/or immediate data. Addresses require two
extension words because only absolute long addressing is permitted. Longword accesses are forcibly
longword-aligned and word accesses are forcibly word-aligned. Immediate data can be 1 or 2 words long.
Byte and word data each requires a single extension word, while longword data requires two extension
words.
Operands and addresses are transferred most-significant word first. In the following descriptions of the
BDM command set, the optional set of extension words is defined as address, data, or operand data.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Operation
0
R/W
Op Size
0
0
A/D
Register
Extension Word(s)
Figure 32-16. BDM Command Format
Table 32-21. BDM Field Descriptions
Field
Description
15–10
Operation
Specifies the command. These values are listed in
.
9
Reserved, must be cleared.
8
R/W
Direction of operand transfer.
0 Data is written to the CPU or to memory from the development system.
1 The transfer is from the CPU to the development system.
7–6
Op Size
Operand Data Size for Sized Operations. Addresses are expressed as 32-bit absolute values. A command
performing a byte-sized memory read leaves the upper 8 bits of the response data undefined. Referenced data is
returned in the lower 8 bits of the response.
5–4
Reserved, must be cleared.
3
A/D
Address/Data. Determines whether the register field specifies a data or address register.
0 Data register.
1 Address register.
2–0
Register
Contains the register number in commands that operate on processor registers. See
Operand Size
Bit Values
00
Byte
8 bits
01
Word
16 bits
10
Longword
32 bits
11
Reserved
—
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