ColdFire Core
MCF52277 Reference Manual, Rev. 1
3-16
Freescale Semiconductor
3. The processor saves the current context by creating an exception stack frame on the system stack.
The exception stack frame is created at a 0-modulo-4 address on top of the system stack pointed to
by the supervisor stack pointer (SSP). As shown in
, the processor uses a simplified
fixed-length stack frame for all exceptions. The exception type determines whether the program
counter placed in the exception stack frame defines the location of the faulting instruction (fault)
or the address of the next instruction to be executed (next).
4. The processor calculates the address of the first instruction of the exception handler. By definition,
the exception vector table is aligned on a 1 Mbyte boundary. This instruction address is generated
by fetching an exception vector from the table located at the address defined in the vector base
register. The index into the exception table is calculated as (4
×
vector number). After the exception
vector has been fetched, the vector contents determine the address of the first instruction of the
desired handler. After the instruction fetch for the first opcode of the handler has initiated,
exception processing terminates and normal instruction processing continues in the handler.
The table contains 256 exception vectors; the first 64 are defined for the core and the remaining 192 are
device-specific peripheral interrupt vectors. See
Chapter 15, “Interrupt Controller Modules”
for details on
the device-specific interrupt sources.
Table 3-5. Exception Vector Assignments
Vector
Number(s)
Vector
Offset (Hex)
Stacked
Program
Counter
Assignment
0
0x000
—
Initial supervisor stack pointer
1
0x004
—
Initial program counter
2
0x008
Fault
Access error
3
0x00C
Fault
Address error
4
0x010
Fault
Illegal instruction
5
0x014
Fault
Divide by zero
6–7
0x018–0x01C
—
Reserved
8
0x020
Fault
Privilege violation
9
0x024
Next
Trace
10
0x028
Fault
Unimplemented line-A opcode
11
0x02C
Fault
Unimplemented line-F opcode
12
0x030
Next
Debug interrupt
13
0x034
—
Reserved
14
0x038
Fault
Format error
15–23
0x03C–0x05C
—
Reserved
24
0x060
Next
Spurious interrupt
25–31
0x064–0x07C
—
Reserved
All ColdFire processors support a 1024-byte vector table aligned on any 1 Mbyte address boundary (see
).
Summary of Contents for MCF52277
Page 22: ...MCF52277 Reference Manual Rev 1 Freescale Semiconductor xxii...
Page 32: ...MCF52277 Reference Manual Rev 0 xxxii Freescale Semiconductor...
Page 60: ...Signal Descriptions MCF52277 Reference Manual Rev 1 2 16 Freescale Semiconductor...
Page 128: ...Static RAM SRAM MCF52277 Reference Manual Rev 1 6 6 Freescale Semiconductor...
Page 140: ...Clock Module MCF52277 Reference Manual Rev 1 7 12 Freescale Semiconductor...
Page 172: ...Chip Configuration Module CCM MCF52277 Reference Manual Rev 1 9 16 Freescale Semiconductor...
Page 180: ...Serial Boot Facility SBF MCF52277 Reference Manual Rev 1 10 8 Freescale Semiconductor...
Page 188: ...Reset Controller Module MCF52277 Reference Manual Rev 1 11 8 Freescale Semiconductor...
Page 210: ...Crossbar Switch XBS MCF52277 Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 542: ...FlexCAN MCF52277 Reference Manual Rev 1 23 32 Freescale Semiconductor...
Page 724: ...UART Modules MCF52277 Reference Manual Rev 1 30 34 Freescale Semiconductor...
Page 740: ...I2 C Interface MCF52277 Reference Manual Rev 1 31 16 Freescale Semiconductor...
Page 790: ...Debug Module MCF52277 Reference Manual Rev 1 32 50 Freescale Semiconductor...