Festo CAMC-G-S1, Translation Of The Original Instructions

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2 Product description for safety module CAMC-G-S1
Festo – GDCP-CAMC-G-S1-EN – 1412b – English 19
Note
The brake is activated by the motor controller’s non-safety firmware.
Note
If one of the control ports STO-A or STO-B is deactivated with an active output stage,
the drive coasts unbraked if no holding brake is connected.
This can cause damage to the machine. It is therefore recommended that a holding
brake is connected to the motor controller.
Please check whether the motors with holding brake you use is designed to decelerate
and bring the motor to a standstill via the holding brake, should malfunction occur.
The safe state can be requested when the power semiconductor (PWM) is activated. The two driver
supply voltage states are detected and analysed in 10 ms cycles If they are unequal over a prolonged
period, an error message is triggered
è
Section 5.4.2. The safety function presupposes that the two
signals have the same status. Unequal signals are tolerated only during a transition period, the so-
called “discrepancy time”
è
Section 2.2.3.
The finite state machine in motor controller CMMP-AS-...-M3 has its own status in parallel to the safety
module CAMC-G-S1. Due to the discrepancy time analysis, this finite state machine may reach the
“Safe status” only with a considerable delay. Accordingly, this state can also be signalled via digital
outputs or a fieldbus only with a considerable delay. The power end stage itself is then, however,
“safely switched off ”. This finite state machine is processed within the 10 ms cycle.
This generally results in a graded response speed as per Tab. 2.4:
Function Response time Reaction
Switching time from
high to low
T_STO-A/B_OFF
è
Section A.1.4, Tab. A.8
Switching time from
low to high
T_STO-A/B_ON
è
Section A.1.4, Tab. A.8
Detection of driver supply
failure
t
Reaction

125 μs Activation of the power semiconductor (PWM)
is switched off
Activation of holding brake t
Reaction

10 ms Activation of the holding brake after detection
of the driver supply failure
Signal analysis and status
display
t
Reaction

10 ms Status transitions in the internal finite state
machine, triggering an error message and
showing the status on the display if necessary
Tab. 2.4 Detection and response times of the driver supply voltage