About the Test System
Instruction Manual ATS 400 with SC-NG
Version 4.03
15
4 USB connectors
1 Audio Line out
1 Audio Mic in
4.3.1
ETL-Interface for Selection and Operation Panels
The ETL-Interface contains the most important digital inputs and outputs to the
remote control via PLC or to the connection of an operation interface. The settings
and using of the interface is described in chapter 9 starting from page 44.
The interface is executed as a 25-pole SUB-D connection jack (female).
The exact specifications of the pins are described in the following table:
PIN
IN/OUT
Designation
Explanation
1
Out
Output 24 V
2
GND
3
Out 1
Output
PASS
Digital display of the overall result, e.g. to
drive a “PASS”-lamp or a PLC.
4
Out 2
Output
FAIL
Digital display of the overall result, e.g. to
drive a „FAIL“-lamp or a PLC.
5
Out 3
Output
IN OP
Digital display for a feedback signal of an
active safety-related test of the test
system. Between the individual tests the
bit changes from 1 to 0.
6
Out 4
Output
RESULT-IMPULSE
Adjustable digital display of an impulse,
e.g. an impulse for an error buzzer in case
of the overall result “FAIL” or an impulse
for an expulsion of the test object in case
of the overall result “PASSED”.
7
Out 5
Output
DUMMY-OUT
Digital output for the demand for or the
start of a dummy test via e.g. a PLC. The
test system is now waiting for the
feedback signal of the PLC or for the
dummy-test object to be ready for the
test.
8
Out 6
Output
READY FOR
OPERATION
Digital Output to signalize the operable
status after the activation of the device.
The device then stands in a dormant state,
e.g. waiting for the starting command of a
PLC.
or
Locking
Using safety cabinets this output can be
used to lock the safety cabinet even during
the time no test is active. This is
supported with
ETL DataView 3
version
3.8.33.160 or newer and remote control
9
Out 7
Output SHK
Safety Circuit:
0 = open, 1 = locked
or
Output
external relay 1
Digital output for the selection of an
external relay. The actuation and release
time of the relay must not be longer than
200 ms because the corresponding test
starts after that time.