Eaton MP-4000, Instruction Bulletin For Installing, Operating, And Maintaining

Page: 52 / 112

Page 5-12 www.eaton.com
IB02602002E MP-4000
The four History pages are:
Setting P14L1, Motor History Reset (MTR RST)
Setting P14L2, Trip History Reset (TRIP RST)
Setting P14L3, Alarm History Reset (ALRM RST)
Setting P14L4, History Totals Reset (TOT RST)
Refer to Section 4 for more information on the History Mode displays
that can be cleared.
5.15 Page 15, SPVUTRP, Settings P15l1 to P15l7
5.15.1 Setting P15l1, V1,V2 Threshold (VPNT)
P15L1 sets the voltage threshold (in volts) above which the phase
unbalance ratio (VUT, P15L2) trip function becomes active.
5.15.2 Setting P15l2, Ratio of V2 TO V (VUT)
P15L2 sets the ratio of V2 to V1 (in percentage) above which the unit
trips.
5.15.3 Setting P15l3, Phase Unbalance Trip and alarm Start
Delay (VUSD)
P15L3 sets the number of seconds after a start until the voltage unbal
-
ance trip and alarm elements are enabled.
5.15.4 Setting P15l4, Phase Unbalance Trip Run Delay (VUTR)
Sets the number of seconds that the voltage ratio must remain above
the VUT setpoint before a trip event occurs. This timer will not begin
until after the Phase Unbalance Trip & Alarm Start Delay (VUSD,
P15L6) alarm function becomes active.
5.15.5 Setting P15l5, V2 Threshold (VPNa)
Sets the voltage threshold for V1 or V2 (in volts) above which the
phase unbalance (VUA, P15L6) alarm function becomes active.
5.15.6 Setting P15l6, Ratio of V2 to V1 (VUa)
Sets the ratio of V2 to V1 (in percentage) above which the unit will
alarm.
5.15.7 Setting P15l7 Phase Unbalance Run alarm Delay (VUaR)
Sets the number of seconds that the voltage ratio must remain above
the VUA setpoint before an alarm event occurs. This timer does
not begin until after the Phase Unbalance Trip & Alarm Start Delay
(VUSD) has timed out.
5.16 Page 16, SPVUTRP, Settings P16l1 to P16l5
5.16.1 Setting P16l1, Under Frequency Trip Threshold (UFT)
P16L1 sets the value (in Hz) below which the under frequency trip
function begins to time out.
5.16.2 Setting P16l2, Under Frequency Trip alarm Start Delay
(UFSD)
P16L2 sets the number of seconds after a start until the under fre
-
quency trip and alarm elements are enabled.
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5.16.3 Setting P16l3, Under Frequency Trip Run Delay (UFTR)
P16L3 sets the number of seconds that the frequency must remain
below the Under Frequency Trip Threshold (UFT) setpoint before a
trip event occurs. This timer does not begin until after the Under Fre
-
quency Trip & Alarm Start Delay (UFSD) has timed out.
5.16.4 Setting P16l4, Under Frequency alarm Threshold (UFa)
P16L4 sets the number of seconds that the frequency must remain
above the UFA setpoint before an alarm event occurs. This timer
does not begin until after the Over Frequency Trip & Alarm Start Delay
(UFSD) has timed out.
5.16.5 Setting P16l5, Under Frequency alarm Run Delay (UFaR)
P16L5 sets the number of seconds that the frequency must remain
below the UFA setpoint before an alarm event occurs. This timer will
not begin until after the Under Frequency Trip & Alarm Start Delay
(UFSD) has timed out.
5.17 Page 17, SP OFTRP, Settings P17l1 to P17l5
5.17.1 Setting P17l1, Over Frequency Trip Threshold (OFT)
P17L1 sets the value (in Hz) above which the over frequency trip func
-
tion begins to time out.
5.17.2 Setting P17l2, Over Frequency Trip / alarm Start Delay
(OFSD)
P17L2 sets the number of seconds after a start before the over fre
-
quency trip and alarm elements are enabled.
5.17.3 Setting P17l3, Over Frequency Trip Run Delay (OFTR)
P17L3 sets the number of seconds that the frequency must remain
above the Over Frequency Trip Threshold (OFT) setpoint before a trip
event occurs. This timer does not begin until after the Over Frequency
Trip & Alarm Start Delay (OFSD) has timed out.
5.17.4 Setting P17l4, Over Frequency alarm Threshold (OFa)
P17L4 sets the frequency (in Hz) above which the unit alarms.
5.17.5 Setting P17l5, Over Frequency alarm Run Delay (OFaR)
P17L5 sets the number of seconds that the frequency must remain
above the OFA setpoint before an alarm event occurs. This timer
does not begin until after the Over Frequency Trip & Alarm Start Delay
(OFSD) has timed out.
5.18 Page 18, SP OVTRP, Settings P18l1 to P18l7
5.18.1 Setting P18l1, Over Voltage Trip Pickup Criterion (OVPT)
P18L1 sets the number of phases required to cause an overvoltage
trip event.
5.18.2 Setting P18l2, Over Voltage Main Trip Threshold (OVT)
P18L2 sets the voltage threshold (in volts) above which the MP-4000
trips.
5.18.3 Setting P18l3, Over Voltage Main Run Delay (OVTR)
P18L3 sets the number of seconds that the voltage must remain
above the Over Voltage Trip Threshold (OVT) set point before a trip
event occurs. There is no start delay for this function.