Embedded Solutions
Page 24
TxFifoAmtInt when set enables the programmable interrupt based on the Transmit FIFO
level. Set the level to provide enough time to load more data. Since a programmed
level the amount of room [minimum] is already known. Alternatively use DMA for
automatic data transfer.
TxUflInt when set enables the Transmitter UnderFlow interrupt. If the last stage FIFO
is ever empty when the State-Machine needs another data point this status bit is set. If
this bit is enabled the status becomes an interrupt.
TxDataOrder, RxDataOrder can be used to swap the pixel order within each LW. On a
Windows system setting the bit will cause the lower pixel to be transmitted/received first.
X76543210 comes out x3210 x7654. Since endianness is affected by the CPU and the
OS and the driver you may need to experiment to get the data into the order you prefer.
Please note in the example, the “7” would be clipped since 14 bits of the 16 are actually
transmitted. The “3” would be ok since both of the upper bits are 0’s.
TxFrameCntEn when set allows the synchronization counter to run. The counter runs
from 0 to the programmed end count and repeats. A pulse is output at the end of each
counting cycle. TxFrameCntLd loads the Counter to a fixed value of 0x00 [basically a
clear in our application]. If the counter is disabled and a standard time base for restart
is required the counter should be cleared before being re-enabled.
RxOflInt when set enables the Receiver OverFlow Interrupt. If the Receiver FIFO is full
when it is time to load another LW the status is set. If the interrupt is enabled the
status becomes and interrupt request.
RxStart when set enables the receiver to capture data. Data is received, deserialized
and loaded into the receive FIFO. In standard operation the receiver waits for frame
sync to start capture.
CaptureAll when set causes the Receiver to capture all sync patterns and not wait for
frame sync to occur.
TxInitialIdle : Tx Initial Idle when set ‘1’ will cause the transmitter to use the IDLE
pattern to broadcast as soon as the transmitter is enabled. When not transmitting data
IDLEs are sent. When cleared, the IDLE pattern is only sent during “live”
transmissions. Not sent until the first frame is sent and stop once last frame is sent.
