Error Registers
3-9
3.5
Miscellaneous Register (MISC)
This register is designed so that only writes of 1 affect it. When a 1 is written to
any bit in the register, the programmer does not need to be concerned with read-
modify-write or the status of any other bits in the register. Once NXM is set, the
NXS field is locked. It is unlocked when software clears the NXM field. The
ABW (arbitration won) field is locked if either ABW bit is set, so the first CPU to
write it locks out the other CPU. Writing a 1 to ACL (arbitration clear) clears
both ABW bits and both ABT (arbitration try) bits and unlocks the ABW field.
Address
801 A000 0040
Access
RW
63
0
32
PK1417-99
31
4 3
44 43
40 39
29 28 27
25 24 23
20
19
16 15
12
11
8
7
2 1
reserved
DEVSUP
REV
NXS
000
NXM
00
ACL
ABT
ABW
IPREQ
IPINTR
ITINTR
CPUID