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AD1200 Reference

Calibration

FE to FF hex.

Provided the calibration is performed in the correct order,
OFFSET adjust then GAIN adjust, there should be no interaction
between the two adjustments.

Equipment Required.

___________________
A precision voltage source capable of a stable output and
resolution of 1/10th of LSB at both ends of the range of the
converter . Thus the voltage source should have a range of -5 to
+10 volts and a resolution of 1.22mV/10 = 122uV or better.

Figure 4-6. ADC Calibration Wiring Diagram.

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ADC Calibration Procedure.

_________________________

i)

Set up the ADC input jumpers for the input range required,
make a note of the input range.

ii)

Using leads as short as possible connect up the digital
voltmeter as in Figure 4-5

iii)

Using Figures 4-7 & 4-8 determine the precision voltage
source output for the 1/2 LSB code above that producing
the 000 hex output code, the 000+1/2LSB value.

Page 78

Chapter 4

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Summary of Contents for AD-593

Page 1: ...2 1 EDITION Feb 1995 d a 1200 Series...

Page 2: ...orward route to excellence in signal acquisition Extend your grasp with AD1200 Your board is designed and manufactured in England and our policy is one of complete support to our dealers and direct to...

Page 3: ...o Analogue conversion and explains exactly how the AD1200 range implements these Downwards compatibility with the DT2811 is discussed as well as the extra high performance features that distinguish th...

Page 4: ...ration of the AD1200 analogue circuitry The use of the calibration software the position and function of the onboard trimmer pots and use of ancillary equipment are all described Calibration should be...

Page 5: ...ogue 5 Unipolar Vs Bipolar Voltage Ranges 8 Differential Vs Single Ended Signals 8 The Analogue To Digital Converter 9 Input Channel Selection 10 Programmable Gain 11 Analogue Input Ranges 11 Programm...

Page 6: ...Three Bit A D Conversion 7 Figure 1 7 Bit Weights And Resolution 8 Figure 1 8 Mode 0 1 Bits 16 Figure 1 9 Extended Mode Bits 17 Chapter 2 Installation Guide _________________________ _ Introduction 2...

Page 7: ...Figure 2 9 The DMA Jumper Block 37 Figure 2 11 A D Channel Input Select 39 Figure 2 12 AD1200 A D Input Range Selection 40 Figure 2 13 AD1210 A D Input Range Selection 41 Figure 2 14 AD1220 A D Input...

Page 8: ...nput Port Register Read Only 66 The Timer Extended Mode Register Read Write 66 Bits 0 5 TIMER Pacer Clock Divisor Bits R W 67 Bits 6 7 XMODE Extended Mode Read Write 69 The 8254 Counter Timer Register...

Page 9: ...4 DAC1 Calibration Procedure 75 Calibrating The Analogue To Digital Input 77 Outline 77 Equipment Required 78 ADC Calibration Procedure 78 Chapter 4 List Of Figures _______________________ Figure 4 1...

Page 10: ...inguish the AD1200 range this improved design whilst retaining exact compatibility with other manufacturers products gives AD1200 extreme flexibility in its application and use Converter throughput Pr...

Page 11: ...ut 12 bit Channels Type 16 Single Ended jumper OR 8 Differential selectable OR 16 Pseudo Diff Channel Select Programmable Bipolar Input 10Volt 5Volt 2 5Volt Unipolar Input 0 10Volt 0 5Volt Interrupts...

Page 12: ...200 DAC1 Output AD1200 DIG Output AD1200 DIG Input AD1200 From AD1221 Up To AD1200 __________________________ So progressing from the entry level AD1221 to the fully featured AD1200 card we have the f...

Page 13: ...Hz A D through put Programmable Gain of 1 2 4 8 for High level input signals The ultimate 12 bit data acquisition system AD1200L DMA input from A D converter or Digital Input port DMA output to D A co...

Page 14: ...A D Done Interrupt Yes Yes DAC0 Interrupt Yes No DAC1 Interrupt Yes No Digital In Interrupt Yes No Digital Out Interrupt Yes No DMA A D Done DMA Yes No DAC0 DMA Yes No DAC1 DMA Yes No Digital In DMA...

Page 15: ...ss to half light would be off half light to full illumination would be on One bit gives two illumination states In general terms resolution means separation into components The resolution of a convert...

Page 16: ...the resolution of the converter increases the smallest resolvable interval decreases in size and the digital representation of the light intensity begins to approach the smooth continuously variable...

Page 17: ...04 84 3 15 32 768 0 00305 30 52 90 3 16 65 536 0 00153 15 26 96 3 17 131 072 0 00076 7 63 102 4 18 262 144 0 00038 3 82 108 4 19 524 288 0 00019 1 91 114 4 20 1 048 576 0 00010 0 95 120 4 Unipolar Vs...

Page 18: ...ng one wire equally effects the other but the DIFFERENCE in voltage between the wires remains constant thus the noise has little or no effect on the analogue signal Twisted pair cables are usually use...

Page 19: ...DMA direct memory access with successive conversions being initiated either by the users program via the pacer clock or synchronised to external user supplied signals Input Channel Selection _________...

Page 20: ...ogrammable gain is a powerful feature enabling the AD1200 series to convert input signals of widely different levels making the cards very flexible and expanding the number of possible applications va...

Page 21: ...i o is also known as polled i o since the user has to constantly poll the converter status bits to see if it is done The users software built from the Real World driver thus starts tests for and servi...

Page 22: ...DMA input cycle The DMA controller reads the ADCLO and then the ADCHI input registers placing the data straight into memory without the help of the computers micro processor When the last of the conv...

Page 23: ...of the TTL compatible digital ports A D Throughput and Pipelining ____________________________ The throughput of the A D converter is how many conversions can be performed within a given period of ti...

Page 24: ...e data from A D converter is moved by the DMA controller directly into the PC s memory and the PC s own processing power is unimportant and the throughput of the converter is at its maximum ie 30kHz f...

Page 25: ...0 0 0 0 Single A D Conversion when ADGCR A D Gain Channel Register is written 1 0 1 Continuous A D conversions by pacer clock using on board 600kHz oscillator Clock started when ADGCR is written 2 1...

Page 26: ..._____________ _ Mode 0 Single Conversions ________________________ _ In Mode 0 each write to the ADGCR the A D Gain Channel Register register 1 generates an A D strobe The following method should be u...

Page 27: ...mmed i o an interrupt service routine or by the DMA controller v A D Strobes will be automatically generated by the pacer clock at the chosen rate based on the 600kHz oscillator until the clock is sto...

Page 28: ...hod should be used Mode 3 allows the a series of conversions to be synchronised with external events or to an external device i The mode bits in the ADCSR A D Control Status Register register 0 should...

Page 29: ...AD1200 card only has the ability to use interrupt driven or DMA outputs modes to the D A converters i The mode bits in the ADCSR A D Control Status Register register 0 should be set to 01 02 or 03 ie...

Page 30: ...ort Programmed I O __________________________ Digital i o is usually performed using programmed i o As the data is written to the digital output register the bit pattern immediately appears on the dig...

Page 31: ...DMA TC terminal count signal The clock may also stopped by a write to the ADCSR Screw Terminal Board ____________________ _ The easiest and tidiest way to connect your i o card to your rig is via the...

Page 32: ..._ The primary reason for for using 4 20mA currents in the transmission of analogue signals is because currents can be sent a long way without loss and without being greatly degraded by noise When vol...

Page 33: ...200 is to be installed in another make of PC then it may be necessary to consult the instructions included in that PC s documentation The two third size PC AD1200 board will fit into both long or a sh...

Page 34: ...1F hex Interrupt Jumper IRQ7 DMA Jumper DMA1 AD1200 Only DAC0 settings 5 to 5 Volts BIPOLAR output DAC1 settings 5 to 5 Volts BIPOLAR output ADC settings 16 Channels of Single Ended 5 to 5 Volts BIPOL...

Page 35: ...5 5V GAIN SELECT BIPOLAR BIPOLAR BIPOLAR OUTPUT OUTPUT INPUT 50 16 SE INPUTS WAY I O ADDR C 123456 8254 210h A B 8254 Counter Timer 1111 AD1220 21 0218Hex L OUT0 Not Connected 5210234567 E To Output...

Page 36: ...compatibility with future versions of the AD1200 card leave DIP 8 off Only those addresses in the range 0100 03FF hex in Figure 2 7 below are available for use since addresses in the range 0000 00FF...

Page 37: ...FH PC AD1200 Board 0278H 027FH Second Printer Port Adapter 02E1H PC ELITE IEEE Board 02E1H IBM National Instruments IEEE card 02F8H 02FFH Second Serial Port Adapter 0300H 0307H PC Proto card 0300H 030...

Page 38: ...installed Figure 2 7a AD1200 Base Addresses ________________________________ DIP1 DIP2 DIP3 DIP4 DIP5 DIP6 Base Address Of Card ____ ____ ____ ____ ____ ____ ____________________ Off Off Off Off Off...

Page 39: ...f On Off On On Off 0328 Hex 808 Dec On On Off On On Off 0320 Hex 800 Dec Off Off On On On Off 0318 Hex 792 Dec On Off On On On Off 0310 Hex 784 Dec Off On On On On Off 0308 Hex 776 Dec On On On On On...

Page 40: ...228 Hex 552 Dec On On Off On On On 0220 Hex 544 Dec Off Off On On On On 0218 Hex 536 Default ___ ___ __ __ __ __ ________ ___________ On Off On On On On 0210 Hex 528 Dec Off On On On On On 0208 Hex 52...

Page 41: ...Off 02C0 02C8 Hex Off Off On Off On Off 02B0 02B8 Hex On Off On Off On Off 02A0 02A8 Hex Off On On Off On Off 0290 0298 Hex On On On Off On Off 0280 0288 Hex Off Off Off On On Off 0270 0278 Hex On Off...

Page 42: ...1200 Board ____________________________________ _ Since each PC AD1200 card can measure up to 16 Analogue inputs and drive 2 analogue outputs with 8 digital i p and 8 digital output lines it is not ge...

Page 43: ...Q level set in the software Setting The Interrupt Jumper Block _______________________________ _ The PC AD1200 has 1 IRQ jumper block IRQJMP The movable jumper on the jumper block is used to specify w...

Page 44: ...T 1 IRQ5 HARD DISK IN XT OK in 286 386 486 Good choice IRQ6 DISK DRIVE STATUS IRQ7 PRINTER PC AD1200 Recommended DEFAULT IRQ10 Usually Free Good Choice IRQ11 Usually Free Good Choice IRQ12 Usually Fre...

Page 45: ...instructions controlling the enabling and use of the DMA facility are described in later chapters Setting The DMA Channel Jumper Block ____________________________________ AD1200 Only Only the AD1200...

Page 46: ...variety of output voltage ranges Five jumpers for each DAC are used to configure the output range The DAC1 jumpers are labelled DAC1 and are found at the extreme top left hand side of the AD1200 card...

Page 47: ...t channel type and the input voltage range can all be independently selected The A D input channel number selection is under software control On the AD1200 and AD1210 11 the gain is also under softwar...

Page 48: ...____________ 8 Channel Differential Inputs 16 Pseudo Channel Differential Inputs 16 Channel Single Ended Inputs DEFAULT Input Voltage Range The 4 input voltage range selection jumpers are in the centr...

Page 49: ...OLAR 10 to 10 Volts BIPOLAR 5 to 5 Volts BIPOLAR DEFAULT 5 to 5 Volts BIPOLAR DUPLICATE 2 5 to 2 5 V BIPOLAR Note at each of the jumper selectable input ranges the software selectable gains of 1 2 4 8...

Page 50: ...POLAR 10 to 10 Volts BIPOLAR 5 to 5 Volts BIPOLAR DEFAULT 5 to 5 Volts BIPOLAR DUPLICATE 2 5 to 2 5 V BIPOLAR Note at each of the jumper selectable input ranges the software selectable gains of 1 2 4...

Page 51: ...to 5 Volts UNIPOLAR 0 to 2 5 Volts UNIPOLAR 0 to 1 25 Volts UNIPOLAR 10 to 10 Volts BIPOLAR 5 to 5 Volts BIPOLAR DEFAULT 2 5 to 2 5 V BIPOLAR 1 25 to 1 25 BIPOLAR 0 625 to 0 625 BIPOLAR Remember Cali...

Page 52: ...s the A D converter When bit 7 of the Xmode register is set then the CLK2 output drives the A D converter Counter 0 has inputs CLK0 GATE0 and outputs OUT0 Counter 0 is unused and completely free for t...

Page 53: ...n the computer STEP 1 Before the PC AD1200 board can be installed the power to the PC MUST be switched OFF Figure 2 16 Remove Cover Mounting Screws _______________________________________ _ STEP 2 The...

Page 54: ...t on the PC back panel KEEP the blanking cover screw safely for later Figure 2 19 Inserting The PC AD1200 Card ______________________________________ _ STEP 5 Now insert the PC AD1200 card in the slot...

Page 55: ...6 AD Ch 10 Ch2 Retn AD Ch 3 7 7 8 8 AD Ch 11 Ch3 Retn AD Ch 4 9 O O 10 AD Ch 12 Ch4 Retn AD Ch 5 11 O O 12 AD Ch 13 Ch5 Retn AD Ch 6 13 O O 14 AD Ch 14 Ch6 Retn AD Ch 7 15 O O 16 AD Ch 15 Ch7 Retn An...

Page 56: ...inputs in Single Ended Mode are measured relative to this signal AGND Amp Low The return line for CH0 15 The analogue inputs in Pseudo Differential Mode are measured relative to this signal AD CH0 CH...

Page 57: ...put lines There are 7 digital grounds and any external digital circuits connected to the digital input or output lines should be earthed via these ground lines The digital grounds are internally conne...

Page 58: ...identical is subtracted out This is called Common Mode Noise Rejection and it also greatly reduces the effects of ground potential differences in taking signals from various parts in a system Obviousl...

Page 59: ...be damaged or go permanently out of specification This is of particular importance when the Programmable Gain Amplifier is being used a gain of 1000 when set for 2 5 to 2 5 Volts input gives a full sc...

Page 60: ...If you are using the bundled driver software do not access the registers directly otherwise confusion may arise Unless you have GOOD REASON you do not need to program the locations Figure 3 1 AD1200...

Page 61: ...auses no problem in practice since the A D converter is an input only device and DAC0 is an output only device Read Write Assignments ______________________ Not every register is a read and write regi...

Page 62: ...hether single shot or continuous A D conversions are performed and what initiates the repetitive conversions and at what rate they occur Figure 3 2 A D Control Status Register ________________________...

Page 63: ...sy Read Only _______________________ _ This bit is indicates that an A D conversion is in progress Set By An A D strobe Any further A D strobes while this bit is set will cause an A D error due to ove...

Page 64: ...der program control Reset By This is cleared under program control This bit is automatically cleared at power up Bit 2 Interrupt Enable Read Write ________________________________ This bit is is used...

Page 65: ...lock started by Ext Trigger ve edge 3 1 0 Continuous A D conversions by pacer clock using on External Clock Clock started by Ext Trigger ve edge The AD1210 21 cards with the 8254 counter timer chip on...

Page 66: ...ys 0 8254 Timer Counter Initialising The A D Converter ___________________________ The A D converter should be initialised by performing the following steps before changing the mode set in the ADCSR T...

Page 67: ...e Programmable Gain Amplifier output to stabilise This delay is not inserted in continuous A D conversion modes since the new channel information is written after the sample and hold circuitry acquire...

Page 68: ...er up Note The AD1221 and AD1220 cards do NOT have programmable gain and ADGCR bits 6 7 always read back as zero Figure 3 7 Gain Selection _______________________ ADGCR A D Gain Selection Gain Gain Ga...

Page 69: ...fferential 0 0 0 0 00 0 0 0 0 0 1 01 1 1 0 0 1 0 02 2 2 0 0 1 1 03 3 3 0 1 0 0 04 4 4 0 1 0 1 05 5 5 0 1 1 0 06 6 6 0 1 1 1 07 7 7 1 0 0 0 08 8 0 1 0 0 1 09 9 1 1 0 1 0 0A 10 2 1 0 1 1 0B 11 3 1 1 0 0...

Page 70: ...verter The 12 bit ADC converter value is obtained from ADCDATA ADCHI 256 ADCLO The ADC data is in the form of right justified offset binary ie the lowest voltage gives a value of 000hex whilst the hig...

Page 71: ...e DAC0HI register The upper most 4 bits written to the DAC0HI register are don t care bits but should always be set to 0 for compatibility with 16 bit D A software and data formats The DAC0HI and DAC0...

Page 72: ...Write Write Write Write Figure 3 12 DAC0 High Byte Output Register ________________________________________ _ DAC0HI Output Register BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 021B DAC0 DAC0 DAC0...

Page 73: ...justified offset binary ie a value of 000hex gives the lowest output voltage whilst a value of FFFhex gives the highest output voltage The value to write to the 12 bit D A converter to obtain any par...

Page 74: ...___________________ __________ The Digital Output Port Register DIGOUT is an 8 bit write only register The bit values written correspond exactly with the on off logic state of the 8 TTL output lines T...

Page 75: ...rue A reading of 00hex means that all lines were low A reading of 01hex means that only DIGIN line 0 was high all the rest are low TTL output logic level low is 0 0 0 8 Volts TTL output logic level hi...

Page 76: ...divisor factor applied to the fundamental frequency as given in the following table The source of the fundamental clock frequency is either the on board 600kHz oscillator or a user supplied external c...

Page 77: ...000 0 06 0 0 1 0 0 0 08 10 60k 0 0 1 0 0 1 09 100 6k 0 0 1 0 1 0 0A 1000 600 0 0 1 0 1 1 0B 10000 60 0 0 1 1 0 0 0C 100000 6 0 0 1 1 0 1 0D 1000000 0 6 0 0 1 1 1 0 0E 10000000 0 06 0 0 1 1 1 1 0F 1000...

Page 78: ...1 0 1 1 1 0 2E 5000000 0 12 1 0 1 1 1 1 2F 50000000 0 012 1 1 0 0 0 0 30 6 100k 1 1 0 0 0 1 31 60 10k 1 1 0 0 1 0 32 600 1k 1 1 0 0 1 1 33 6000 100 1 1 0 1 0 0 34 60000 10 1 1 0 1 0 1 35 600000 1 1 1...

Page 79: ...1210 21 Extended Mode Bit ______________________________________ AD1210 AD1221 TIMER Extended Mode Bits BIT 7 BIT 6 A D Clock Source 0 Always 0 600kHz On Board Pacer Clock 1 Always 0 8254 Timer Counte...

Page 80: ...the digital input port pins 34 35 36 Counter 0 counts pulses on the CLK 0 input pin 24 when the GATE 0 pins is high pin 35 Its output is via pin 36 of the 50 way IDC connector provided the OUT VIA PIN...

Page 81: ...Electronics calibration equipment the voltage source is a Time 2003N D C Voltage Calibrator the voltmeter is A Time Electronics 5075 Digital Multimeter The best on the market Note Allow the PC with th...

Page 82: ...et the desired value Provided the calibration is performed in the correct order OFFSET adjust then GAIN adjust there should be no interaction between the two adjustments Equipment Required ___________...

Page 83: ...im pot 5 for minus full scale value eg for range 5 to 5 bipolar the ideal offset voltage is 5 0000 Volts 0 0002 Volt For UNIPOLAR ranges adjust trim pot 6 for zero volts eg for range 0 to 5 unipolar t...

Page 84: ...0000V 10 0000V 1 LSB 1 22mV 2 44mV 1 22mV 2 44mV 4 88mV 1 10LSB 0 122mV 0 244mV 0 122mV 0 244mV 0 488mV 1 10LSB 0 0001V 0 0002V 0 0001V 0 0002V 0 0005V DAC1 Calibration Procedure _____________________...

Page 85: ...ting the digital code FFF hex to the converter vi Using Figure 4 3 determine the ideal output voltage for the FFF hex input code the 1 10 LSB value is the precision required This is the GAIN adjustmen...

Page 86: ...RENT ORDER ON PREVIOUS VERSIONS OF THESE CARDS AD1200 PRIOR TO REV 5 AD1210 PRIOR TO REV 4 AD1200 PRIOR TO REV 4 Outline _______ The calibration is simple It consists of only two steps i Using a preci...

Page 87: ...a resolution of 1 22mV 10 122uV or better Figure 4 6 ADC Calibration Wiring Diagram ________________________________________ PRECISION VOLT SOURCE ve ve Pin CH0 INPUT Pin CH8 CH0 RET INPUT CH1 CH7 CH...

Page 88: ...e vi Adjust the GAIN trimpot so that the input code from the A D converter flickers evenly between FEhex and FFhex This is the GAIN adjustment Adjust trim pot 3 for for FEhex to FFhex transition eg fo...

Page 89: ...1 25V 2 5V 5V 10V FSR 0 6250V 1 2500V 2 5000V 5 0000V 10 0000V FSR 1LSB 0 6247V 1 2494V 2 4988V 4 9976V 9 9951V FSR 1 5LSB 0 6245V 1 2491V 2 4982V 4 9963V 9 9927V 000 hex 0 6250V 1 2500V 2 5000V 5 000...

Page 90: ...B at 60Hz gain of 1 Rejection Ratio 120 dB at 60Hz gain of 1000 Maximum Input Voltage 30V power on 30V power on Resolution 12 bits Nonlinearity less than 1 2 LSB Differential nonlinearity less than 1...

Page 91: ...ity 0 to 70 degree C Analog Outputs ______________ Resolution 12 bits Bipolar Output 10V 5V 2 5V Unipolar Output 0 10Volt 0 5Volt Nonlinearity less than 1 4 LSB Differential nonlinearity less than 1 2...

Page 92: ...Clock 0 005Hz 600kHz Divisor 1 to 120 000 000 External Clock TTL compatible DC to 1Mhz External Trigger TTL compatible active on negative edge Power Consumption __________________ 5 Volts 5 500 milli...

Page 93: ...5 26 27 33 34 35 36 37 38 39 40 45 47 48 49 50 54 55 56 66 69 72 77 AD1200L 4 AD1210 1 4 14 15 26 41 43 54 67 70 77 AD1211 1 3 14 15 26 41 43 54 67 82 AD1220 1 3 11 14 15 26 42 43 54 58 59 82 AD1221 1...

Page 94: ...s conversion 17 57 70 D A converter 4 14 20 47 52 61 62 63 64 73 DAC0 5 17 20 25 26 37 46 52 54 57 61 62 63 67 70 72 73 74 75 DAC0 ground 46 47 49 DAC0HI 62 DAC0LO 62 63 DAC1 5 17 20 25 26 37 46 52 54...

Page 95: ...20 22 46 48 83 Extreme 1 8 37 Fan in 83 Fan out 83 Frequency 14 18 19 20 22 48 66 67 68 69 FSR 79 80 Gain 1 5 10 15 17 19 26 38 40 42 49 51 58 59 73 74 76 77 78 79 81 82 Gain error 81 82 Gain select 2...

Page 96: ...y 82 Multimeter 72 Multiplexer 10 11 14 77 Noise 9 23 49 Nonlinearity 81 82 Offset 61 64 73 74 76 79 81 82 Offset binary 61 62 64 Offset error 81 82 Offset trim 73 77 Oscillator 14 16 18 19 21 22 43 4...

Page 97: ...0 Single conversion 16 58 Single ended 2 8 10 25 38 39 47 49 50 60 81 Strobe 14 16 22 54 55 56 58 70 Strobes 18 19 20 21 22 54 55 67 71 Technical 81 Temperature 5 10 72 Throughput 1 2 3 4 5 14 15 67 8...

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