AD1200 Reference
Introduction
gain of 1000 otherwise a 10 Volt signal will be fed from the
PGA into the A/D converter, four times over scale!
Programmed I/O, Interrupts and DMA.
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The A/D conversion may be performed under programmed
i/o, interrupt driven input or via DMA, direct memory access.
Programmed I/O.
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In programmed i/o mode, the user’s program initiates an
A/D conversion and then monitors the A/D Done bit, register 0
bit 7, waiting until it is set. This indicates that the conversion
has been completed and the digitised value of the input voltage
is waiting to be read from the ADCLO and ADCHI input
registers. Having read the contents of these registers, low byte
first and high byte last, thus clearing the A/D Done bit, the next
A/D conversion may be performed.
Programmed i/o is also known as ’polled i/o’ since the
user has to constantly poll the converter status bits to see if it is
done.
The users software, built from the Real World driver, thus
starts, tests for, and services each conversion. Though
programmed i/o is easily understood, the PC and the program
are consumed by the process of performing the A/D conversions.
Thus programmed i/o is used for single conversions or low
sample rate continuous conversions.
Interrupt Driven I/O.
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In interrupt driven mode, after interrupts are enabled and
the start of the first conversion has been triggered, when the
conversion is done, the A/D Done bit is set and this
automatically causes a hardware interrupt which makes the
computer execute an ISR, interrupt service routine. The interrupt
service routine reads the ADCLO and then the ADCHI input
registers and stores the data in memory. When enough
conversions have taken place, the interrupt service routine
disables A/D interrupts and if necessary stops the pacer clock.
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Chapter 1
