12 Programming Model
12 – 8
On the ADSP-2181, wait states are applied to external memory overlay
accesses. Other memory-mapped registers control the IDMA port and
byte memory DMA port for booting operations—selecting the byte
memory page, specifying the number of wait states, and forcing the boot
from software—and runtime access of byte memory.
12.1.8
Host Interface
The ADSP-2171, ADSP-2111, ADSP-21msp58/59 processors contain a host
interface port (HIP). The host interface has six data registers, two status
registers and an interrupt mask register. These registers are memory-
mapped at data memory locations 0x3FE7 – 0x3FE0. The status registers
contains status flags for each of the data registers. The HMASK register
lets you enable or disable the generation of HIP read or HIP write
interrupts independently for each HIP data register. HMASK is memory-
mapped at data memory location 0x3FE8.
12.1.9
Analog Interface
The analog interface of the ADSP-21msp58/59 has four memory-mapped
registers. These registers are memory-mapped in data memory locations
0x3FEC – 0x3FEF. The transmit register sends data to the DAC for
transmitting. The receive register receives data from the ADC. The analog
control register contains bits that select amplifier, gain, analog input and
filter options.
12.2
PROGRAM EXAMPLE
Listing 12.1 presents an example of an FIR filter program written for the
ADSP-2111 with discussion of each part of the program. The program can
also be executed on any other ADSP-21xx processor, with minor
modifications. This FIR filter program demonstrates much of the conceptual
power of the ADSP-2100 family architecture and instruction set.
{ADSP-2111 FIR Filter Routine
-serial port 0 used for I/O
-internally generated serial clock
-12.288 MHz processor clock rate is divided to 1.536 MHz serial clock
-serial clock divided to 8 kHz frame sampling rate}
.MODULE/RAM/ABS=0
main_routine; {program loaded from }
{EPROM, with MMAP=0 }
.INCLUDE
<const.h>;
.VAR/DM/RAM/ABS=0x3800/CIRC
data_buffer[taps]; {on-chip data buffer}
.VAR/PM/RAM/CIRC
coefficient[taps];
.GLOBAL
data_buffer, coefficient;
.EXTERNAL
fir_start;
.INIT
coefficient:<coeff.dat>;
A
B
