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Chapter 3: Testing Performance
To test the single-clock, multiple-edge, state acquisition
2
Check the data pulse width. Using the oscilloscope, verify that the data
pulse width is 3.000 ns, +0 ps or
−
100 ps:
a
In the oscilloscope Timebase menu, select Scale: 1.000 ns/div.
b
In the oscilloscope Timebase menu, select Position. Using the
oscilloscope knob, position the data waveform so that the waveform is
centered on the screen.
c
On the oscilloscope, select [Shift] + width: channel 1, then select
[Enter] to display the data signal pulse width (+ width(1)).
d
If the pulse width is outside the limits, adjust the pulse generator
channel 2 width until the pulse width is within limits.
Check the setup/hold with single clock, multiple clock
edges
The following setup/hold combinations will be tested.
Setup/Hold Combinations
Test
Combination
Setup/Hold
Times
Setup/Hold
Window
Sample Position
(in middle of Window)
1
5.0/-2.0 ns
3.0 ns
-3.5 ns
2
-1.5/4.50 ns
3.0 ns
+3.0 ns
Summary of Contents for 1680 series
Page 13: ...13 Chapter 1 General Information Dimensions 1680A AD Series 1690A AD Series...
Page 74: ...74 Chapter 3 Testing Performance Performance Test Record...
Page 142: ...142 Chapter 6 Replacing Assemblies 1690A AD series disassembly assembly...
Page 172: ...172 Chapter 8 Theory of Operation Self Tests Descriptions...
Page 174: ......