XMC-6VLX
USER’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 23 - http://www.acromag.com
- 23 -
www.acromag.com
AXI-CDMA
The AXI Central Direct Memory Access (CDMA) core is a soft Xilinx
Intellectual Property core. The CDMA provides direct memory access
between system memory on the PCIe bus and the memory resident on the
XMC-6VLX.
The basic mode of operation for the CDMA is Simple DMA. In this mode, the
CDMA executes one programmed DMA command and then stops. This
requires that the CDMA registers need to be set up by system software over
the PCIe bus for each DMA operation required.
Scatter Gather is a mechanism that allows for automated DMA transfer
scheduling via a pre-programmed instruction list of transfer descriptors
(Scatter Gather Transfer Descriptor Definition). This instruction list is
programmed by the user software application into a memory-resident data
structure that must be accessible by the AXI CDMA Scatter Gather interface.
This list of instructions is organized into what is referred to as a transfer
descriptor chain. Each descriptor has an address pointer to the next
sequential descriptor to be processed. The last descriptor in the chain
generally points back to the first descriptor in the chain but it is not required.
The AXI CDMA Tail Descriptor Pointer register needs to be programmed with
the address of the first word of the last descriptor of the chain. When the
AXI CDMA executes the last descriptor and finds that the Tail Descriptor
pointer matches the address of the completed descriptor, the Scatter Gather
Engine stops descriptor fetching and waits. See the Xilinx DS792 data sheet
for the AXI Central Direct Memory Access for additional details for Scatter
Gather operations.
Table 3.8:
AXI CDMA Registers
Note that any registers/bits not
mentioned will remain at the
default value logic low.
BAR0 Base Addr+
Bit(s)
Description
0x000A0000
31:0
CDMA Control Register
0x000A0004
31:0
CDMA Status Register
0x000A0008
31:0
Current Descriptor Pointer Register
0x000A000C
31:0
Reserved
0x000A0010
31:0
Tail Descriptor Pointer Register
0x000A0014
31:0
Reserved
0x000A0018
31:0
Source Address Register
0x000A001C
31:0
Reserved
0x000A0020
31:0
Destination Address Register
0x000A0024
31:0
Reserved
0x000A0028
31:0
Bytes to Transfer Register
