Installation and Operation Manual
Appendix
D Clock Modes
ACE-3105, ACE-3205 Ver. 5.2
DSL and PSN Timing Modes
D-5
When the clock mechanism re-detects packets that allow clock recovery, it
returns –in terms of monitoring – to the Fine Phase Lock state. Internally,
however, the clock mechanism starts acquiring the phase and frequency of the
clock again, through the Frequency Acquisition or Rapid Phase Lock states. This
process may take several minutes depending on the network's noise, frequency
errors* and phase errors.
The frequency error range depends on the aging of the oscillator (OCXO), which
should be better than +/- 1ppb per day.
Network Types
The type of the PSN with which ACE-3105, ACE-3205 communicates affects the
clock recovery quality. In general, the PSN type is defined according to the
network characteristics, such as delay jitter or packet delay variation (PDV).
Accordingly, a PSN can be defined as either Type A or Type B:
•
Type A – Networks with low jitter (“low noise”) and low PDV. Compatible only
with the Stratum 1 and Stratum 2 clock types.
•
Type B – Networks with high jitter (“high noise”). Compatible with all clock
types.
•
Type C – Networks in DSL-based backhaul applications
•
Type D – For SHDSL links only.
OCXO Component Calibration
The OCXO is the internal hardware component used for the clock recovery
mechanism. Before ACE-3105, ACE-3205 is shipped out to the customer, RAD
performs a special calibration procedure on the OCXO, to ensure it will perform at
the highest accuracy levels possible. If, however, the unit is not used at the
customer site for a long period of time (several months), the OCXO will require an
adaptation period during which the OCXO will self-calibrate as the unit becomes
operational. Therefore, keeping the unit in constant operation ensures that the
OCXO performance will not downgrade.
D.5
DSL and PSN Timing Modes
Using a dedicated clock recovery component and a software license, ACE-3105,
ACE-3205 can adaptively recover the clock stream from a packet-switched
network via the DSL ports, according to the G.8261 requirements. Alternatively,
NTR clock recovery can be used in SHDSL, as explained below.
Adaptive Clock Recovery
The adaptive clock recovery is performed directly from the PSN using a dedicated
pseudowire that originates from the clock distribution device, and then through
the DSLAM and DSL uplinks of ACE-3105, ACE-3205. The clock stream is
Note
