4-30
IM DLM3054-01EN
Digitalization in the Trigger Circuit
After the input signal from the FlexRay bus is digitized by the trigger comparator, the trigger circuit samples it
using the internal clock. Then noise is removed by the majority filter in the Voting Window.
11111 11111 11110 11100 11001 10011 00111 01111 11110 11100 110000000000000 00000000000000000001 0001100111 01111
Trigger comparator
output
Voting Window
Voted data
Internal sampling
clock
Glitch
noise
1 bit is equal to 8 sampling clock periods. The sampling counter is reset at the BSS falling edge of the voted
data. The voted data value when the value of this sampling counter reaches 5 is used as the bit value for
detecting the trigger conditions.
0
0
0
0
0
0
0
0
0
1
1
1
1 1 1
1 1 1
1
1
1 1 1
1 1 0
0
0
0 0 0
0 0 X
0 1
1
1
1 1 1
1 1 0
0
0
0 0 0
0 0 X
1 1
2
1
4
3 5
2 3
3
2
5
4
7
6
1
8 2 4
3 5 7
6
1
8 2 4
3 5 2
1
4
3 5 7
6 8 1
1 3
2
5
4 6 8
7 1 1 3
2
5
4 6 8
7 1
TSS
FSS
BSSn
byte
BSSn+1
Bit slope
Bit value
0
0
1
1
0
1
0
Voted data
Sampling
counter
CAN Bus Trigger [ENHANCED, option]
The instrument triggers based on the trigger conditions of a particular frame or type of data in a CAN bus signal.
1
11 1 1 1
4
15
8N (0≤N≤8)
1 1 1
ID 10-0
Arbitration Field Control Field Data Field
CRC Field ACK
CAN Data Frame (Standard)
DLC
3-0
CRC
Sequence
Data
7
EOF
Recessive
Dominant
SOF
RT
R
IDE r0
ACK Delimiter
ACK slot
CRC Delimiter
Trigger Mode (Mode)
Select the CAN bus trigger mode from one of the settings below.
SOF: Triggers on the start of a frame
Error: Triggers on errors
: Triggers on the AND of the ID bit pattern and Data pattern
: Triggers on the OR of multiple ID bit patterns
SOF(Start of Frame)
The instrument triggers on the start of CAN bus signal frames.
Error
The instrument triggers on error frames (when the error flag is active) or when it detects various errors.
• Error Type (Error Type Or)
Select the types of errors to detect from the following. The instrument triggers if any of the selected errors is
detected.
Error Frame When an active error flag (indicated by six consecutive dominant bits) is
detected
Stuff
When stuff bits are not inserted properly
CRC
When a CRC error is detected
4 Triggering