Instruction Set
3-31
RISC 16-Bit CPU
* CLRC
Clear carry bit
Syntax
CLRC
Operation
0 −> C
Emulation
BIC
#1,SR
Description
The carry bit (C) is cleared. The clear carry instruction is a word instruction.
Status Bits
N: Not affected
Z: Not affected
C: Cleared
V: Not
affected
Mode Bits
OSCOFF, CPUOFF, and GIE are not affected.
Example
The 16-bit decimal counter pointed to by R13 is added to a 32-bit counter
pointed to by R12.
CLRC
; C=0: defines start
DADD
@R13,0(R12)
; add 16-bit counter to low word of 32-bit counter
DADC
2(R12)
; add carry to high word of 32-bit counter
Содержание MSP430x4xx Family
Страница 1: ...MSP430x4xx Family 2007 Mixed Signal Products User s Guide SLAU056G ...
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Страница 6: ...vi ...
Страница 114: ...3 76 RISC 16 Bit CPU ...
Страница 304: ...5 20 FLL Clock Module ...
Страница 340: ...7 8 Supply Voltage Supervisor ...
Страница 348: ...8 8 16 Bit Hardware Multiplier ...
Страница 372: ...9 24 32 Bit Hardware Multiplier ...
Страница 400: ...10 28 DMA Controller ...
Страница 428: ...13 10 Basic Timer1 ...
Страница 466: ...15 24 Timer_A ...
Страница 522: ...17 30 USART Peripheral Interface UART Mode ...
Страница 544: ...18 22 USART Peripheral Interface SPI Mode ...
Страница 672: ...23 12 Comparator_A ...
Страница 692: ...24 20 LCD Controller ...
Страница 746: ...26 28 ADC12 ...