Stanford Research Systems SR620, Руководство пользователя

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Circuit Description 75
SR620 Universal Time Interval Counter
SR620 CIRCUIT DESCRIPTION
PROCESSOR SYSTEM
(Sheet 1 of 16)
The processor is a Z8800 ( Super-8 ) which
integrates a fast 8 bit microprocessor, UART,
counter-timers, and an interrupt controller into one
VLSI component.
The processor is clocked at just above 20 MHz.
The crystal, X101, is specified as a series-
resonant 20 MHz crystal, so it will oscillate at a
few kiloHertz above 20 MHz with the parallel 30
pF load. This crystal is used only for processor
timing.
The processor can address 128K of memory.
There are 16 address bits and one bank select bit.
The bank select bit, -DM, is low to select "data
memory" and high to select "program memory".
The lower 8 bits of the address bus are latched off
the data bus by U102.
The firmware (and the factory calibration bytes )
reside in U103, a 64Kx8 200 ns UVEPROM which
occupies all of "program memory".
U104 is a 32Kx8 static RAM, whose contents are
preserved on power-down by the lithium battery.
The chip-select to the RAM is inhibited when the
RESET is asserted by Q101. This prevents
corruption of the RAM contents when the power is
turned off. This static RAM is mapped into the top
half of "data memory".
Port strobes are generated by U106 and U107. I/O
ports are mapped into the bottom 1/4 of "data
memory" while the 8Kx8 display memory is
mapped into the 2/4 of the bank. Various control
signals are generated by U108-110. The buffered
data bus (to all of the system's I/O ports) is
enabled only if access to the bottom half of "data
memory" is required.
The Z8800 has a prioritizing vector interrupt
controller. Hardware interrupts are assigned as
follows:
Port
Name Function
P2_0
-A/D_Int A/D conversion complete
P2_2 -Stop_Int Stop received
P2_3 -Gpib_Int IEEE-488 interface
P2_4 -RTC 1 kHz real-time clock
P2_6 Ticks_6 To internal counter
P3_2 -Strt_Int Start received
P3_4 -Dropout Power supply dropout
P3_6 Cycles_6 To internal counter
The inputs to the internal 16 bit counters (P2_6
and P3_6) will generate an interrupt on overflow.
These inputs will have a maximum frequency of
about 1.5 MHz, and so may generate interrupts at
up to 60 Hz.
The other bits on the Z8800's ports 2 & 3 are used
as follows:
Port
Name Function
P2_1 -Busrq
Requests assess to
display RAM
P2_5 -Prnt_Stb Printer strobe
P2_7 -Reload Reloads all counters and
timers
P3_0 RS232_In Received serial data
P3_1 RS232_Out Transmitted serial data
P3_3 Busy Printer busy
P3_5 -DM Low for Data Memory
P3_7 -Ttlstopn Stop input enabled
GPIB INTERFACE
(Sheet 2 of 16)
The GPIB (IEEE-488) interface is provided by
U122, a TMS9914A controller. U123 and U124
buffer data I/O to the GPIB connector. U122 is
programmed to provide an Gpib_Int to the Z8800
when data is sent to the unit by the user's GPIB
controller.
PRINTER INTERFACE
(Sheet 2 of 16)
The instrument's firmware allows scope displays to
be printed to Epson compatible printers. Output
data is buffered by U128, an LS octal transceiver.
Output control bits are buffered by the open
collector driver U127, and input control bits are
discriminated by 1/4 and 2/4 of U125.
The printer port may be used as a general
purpose digital I/O port. Normally, the bit Print/-Init
is used to initialize the printer when brought low,
and configure the octal buffer for output when set
high. However, with this bit set low, the Z8800 can
read data which is present at the printer port.