ST10R272L - CENTRAL PROCESSING UNIT
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Note
If a conflict occurs between a bit manipulation generated by hardware, and an
intended software access, the software access has priority and determines the final
value of the respective bit.
4.3
Instruction execution time
The time to execute an instruction depends on where the instruction is fetched from, and
where possible operands are read from or written to. The fastest processing mode is to
execute a program fetched from fast external memory (no wait states), using a 16-bit
demultiplexed bus. Then, most instructions can be processed in one machine cycle.
All external memory accesses are performed by the on-chip External Bus Controller (EBC),
which works in parallel with the CPU.
A detailed description of the execution times for the various instructions and the specific
exceptions can be found in the “ST10 Family Programming Manual”.
The table below shows the minimum execution times required to process an instruction
fetched from the internal RAM or from external memory. These execution times apply to
most of the ST10R272L instructions - except for some branches, the multiplication and the
division instructions and a special move instruction.
The operand and instruction accesses listed below, can extend the execution time of an
instruction:
•
Internal RAM operand reads via indirect addressing modes.
•
Internal SFR operand reads immediately after writing.
•
External operand reads.
Memory Area
Instruction Fetch
Word Operand
Access
Word Instruction
(CPU clock cycles)
Doubleword Instruction
(CPU clock cycles)
Read
from
Write
to
Internal RAM
6
8
0/50
0
16-bit Demux Bus
2
4
100
100
16-bit Mux Bus
3
6
150
150
8-bit Demux Bus
4
8
200
200
8-bit Mux Bus
6
12
300
300
Table 6 Minimum execution times without waitstates
